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5 page 
TMS320F2809, TMS320F2808, TMS320F2806 TMS320F2802, TMS320F2801 TMS320C2802, TMS320C2801, and TMS320F2801x DSPs SPRS230J – OCTOBER 2003 – REVISED SEPTEMBER 2007 6-1 Typical Operational Current Versus Frequency (F2808) .................................................................... 98 6-2 Typical Operational Power Versus Frequency (F2808) ...................................................................... 98 6-3 Emulator Connection Without Signal Buffering for the DSP ................................................................. 99 6-4 3.3-V Test Load Circuit ......................................................................................................... 101 6-5 Clock Timing ..................................................................................................................... 104 6-6 Power-on Reset .................................................................................................................. 105 6-7 Warm Reset ...................................................................................................................... 106 6-8 Example of Effect of Writing Into PLLCR Register .......................................................................... 107 6-9 General-Purpose Output Timing ............................................................................................... 107 6-10 Sampling Mode .................................................................................................................. 108 6-11 General-Purpose Input Timing ................................................................................................. 109 6-12 IDLE Entry and Exit Timing .................................................................................................... 110 6-13 STANDBY Entry and Exit Timing Diagram ................................................................................... 111 6-14 HALT Wake-Up Using GPIOn ................................................................................................. 112 6-15 PWM Hi-Z Characteristics ...................................................................................................... 113 6-16 ADCSOCAO or ADCSOCBO Timing ......................................................................................... 115 6-17 External Interrupt Timing ....................................................................................................... 115 6-18 SPI Master Mode External Timing (Clock Phase = 0) ...................................................................... 118 6-19 SPI Master Mode External Timing (Clock Phase = 1) ...................................................................... 120 6-20 SPI Slave Mode External Timing (Clock Phase = 0) ........................................................................ 121 6-21 SPI Slave Mode External Timing (Clock Phase = 1) ........................................................................ 122 6-22 ADC Power-Up Control Bit Timing ............................................................................................ 124 6-23 ADC Analog Input Impedance Model ......................................................................................... 125 6-24 Sequential Sampling Mode (Single-Channel) Timing ....................................................................... 126 6-25 Simultaneous Sampling Mode Timing ........................................................................................ 127 List of Figures 5 |
