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MICRF211 Datasheet(PDF) 2 Page - Micrel Semiconductor |
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MICRF211 Datasheet(HTML) 2 Page - Micrel Semiconductor |
2 / 18 page Micrel MICRF211 March 2007 2 M9999-030107 (408) 944-0800 Pin Configuration MICRF211AYQS Pin Description 16-Pin QSOP Pin Name Pin Function 1 RO1 Reference resonator input connection to Colpitts oscillator stage. May also be driven by external reference signal of 1.5V p-p amplitude maximum. 2 GNDRF Negative supply connection associated with ANT RF input. 3 ANT RF signal input from antenna. Internally AC coupled. It is recommended that a matching network with an inductor -to-RF ground is used to improve ESD protection. 4 GNDRF Negative supply connection associated with ANT RF input. 5 VDD Positive supply connection for all chip functions. 6 SQ Squelch control logic input with an active internal pull-up when not shut down. 7 SEL0 Logic control input with active internal pull-up. Used in conjunction with SEL1 to control the demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application section) 8 SHDN Shutdown logic control input. Active internal pull-up. 9 GND Negative supply connection for all chip functions except RF input. 10 DO Demodulated data output. 11 SEL1 Logic control input with active internal pull-up. Used in conjunction with SEL0 to control the demodulator low pass filter bandwidth. (See filter table for SEL0 and SEL1 in application section) 12 CTH Demodulation threshold voltage integration capacitor connection. Tie an external capacitor across CTH pin and GND to set the settling time for the demodulation data slicing level. Values above 1nF are recommended and should be optimized for data rate and data profile. 13 CAGC AGC filter capacitor connection. CAGC capacitor, normally greater than 0.47µF, is connected from this pin to GND 14 RSSI Received signal strength indication output. Output is from a buffer with 200 Ω typical output impedance. 15 NC Not Connected (Connect to Ground) 16 RO2 Reference resonator input connection to Colpitts oscillator stage, 7pF, in parallel with low resistance MOS switch-to-GND, during normal operation. Driven by startup excitation circuit during the internal startup control sequence. |
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