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HT83XXX Datasheet(PDF) 11 Page - Holtek Semiconductor Inc |
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HT83XXX Datasheet(HTML) 11 Page - Holtek Semiconductor Inc |
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11 / 39 page  HT83XXX Rev. 1.20 11 May 17, 2007 Data Memory - RAM The data memory is designed with 80 ´8 bits. The data memory is further divided into two functional groups, namely, special function registers (00H~2AH) and general purpose user data memory (30H~7FH). Although most of them can be read or be written to, some are read only. The general purpose data memory, addressed from 30H~7FH, is used for data and control information un- der instruction commands. The areas in the RAM can directly handle the arithmetic, logic, increment, decrement and rotate operations. Ex- cept some dedicated bits, each bit in the RAM can be set and reset by ²SET [m].i² and ²CLR [m].i². They are also indirectly accessible through the Memory Pointer register 0 (MP0:01H). Indirect Addressing Register Location 00H is indirect addressing registers that are not physically implemented. Any read/write operation of [00H] accesses the RAM pointed to by MP0 (01H) re- spectively. Reading location 00H indirectly returns the re- sult 00H. While, writing it indirectly leads to no operation. Accumulator - ACC (05H) The accumulator (ACC) is related to the ALU opera- tions. It is also mapped to location 05H of the RAM and is capable of operating with immediate data. The data movement between two data memory locations must pass through the ACC. Arithmetic and Logic Unit - ALU This circuit performs 8-bit arithmetic and logic opera- tions and provides the following functions: · Arithmetic operations (ADD, ADC, SUB, SBC, DAA) · Logic operations (AND, OR, XOR, CPL) · Rotation (RL, RR, RLC, RRC) · Increment and Decrement (INC, DEC) · Branch decision (SZ, SNZ, SIZ, SDZ etc) Status Register - STATUS (0AH) This 8-bit STATUS register (0AH) consists of a zero flag (Z), carry flag (C), auxiliary carry flag (AC), overflow flag (OV), power down flag (PDF), watchdog time-out flag (TO). It also records the status information and controls the operation sequence. Except the TO and PDF flags, bits in the status register can be altered by instructions similar to other registers. Data written into the status register does not alter the TO or PDF flags. Operations related to the status register, however, may yield different results from those in- tended. The TO and PDF flags can only be changed by a Watchdog Timer overflow, chip power-up, or clearing the Watchdog Timer and executing the ²HALT² instruc- tion. The Z, OV, AC, and C flags reflect the status of the latest operations. On entering the interrupt sequence or executing the subroutine call, the status register will not be automati- cally pushed onto the stack. If the contents of the status is important, and if the subroutine is likely to corrupt the status register, the programmer should take precautions and save it properly. S p e c i a l P u r p o s e D a t a M e m o r y 1 4 H 1 5 H 1 6 H 1 7 H 1 8 H 1 9 H 1 A H 1 B H 1 C H 1 D H 1 E H 1 F H 0 0 H 0 1 H 0 2 H 0 3 H 0 4 H 0 5 H 0 6 H 0 7 H 0 8 H 0 9 H 0 A H 0 B H 0 C H 0 D H 0 E H 0 F H 1 0 H 1 1 H 1 2 H 1 3 H 2 0 H 2 1 H 2 2 H 2 3 H 2 4 H 2 5 H 3 0 H 7 F H 2 6 H 2 7 H 2 8 H 2 9 H 2 A H 2 B H 2 F H : U n u s e d , r e a d a s " 0 " M P 0 I A R 0 A C C P C L T B L P T B L H W D T S S T A T U S I N T C T M R 0 T M R 0 C T M R 1 T M R 1 C P A P A C L A T C H 0 H L A T C H 0 M L A T C H 0 L P W M H L A T C H D G e n e r a l P u r p o s e D a t a M e m o r y P W M C R P W M L V o l u m e C o n t r o l R e g i s t e r ( V O L ) P B P B C RAM Mapping |
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