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TLC7226INE4 Datasheet(PDF) 5 Page - Texas Instruments |
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TLC7226INE4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 25 page TLC7226C, TLC7226I, TLC7226M QUADRUPLE 8BIT DIGITALTOANALOG CONVERTERS SLAS060E − JANUARY 1995 − REVISED JANUARY 2003 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 operating characteristics over recommended operating free-air temperature range dual power supply over recommended power supply and reference voltage ranges, AGND = DGND = 0 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Slew rate *2.5 V •µs Settling time to 1/2 LSB Positive full scale Vref = 10 V *5 s Settling time to 1/2 LSB Negative full scale Vref = 10 V *7 µs Resolution 8 bits Total unadjusted error ±2 LSB Linearity error Differential/integral VDD = 15 V ± 5%, Vref = 10 V ±1 LSB Full-scale error VDD = 15 V ± 5%, Vref = 10 V ±2 LSB Gain error ±0.25 LSB Temperature coefficient of gain Full scale VDD = 14 V to 16.5 V, Vref = 10 V ±20 ppm/ °C Temperature coefficient of gain Zero-code error ±50 µV/°C Zero-code error ±20 ±80 mV Digital crosstalk glitch impulse area Vref = 0 50 nV •s * This parameter is not tested for M suffix devices. single power supply, VDD = 14.25 V to 15.75 V, VSS = AGND = DGND = 0 V, Vref = 10 V (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Supply current, IDD VI = 0.8 V or 2.4 V, No load 5 13 mA Slew rate *2 V •µs Settling time to 1/2 LSB Positive full scale *5 s Settling time to 1/2 LSB Negative full scale *20 µs Resolution 8 bits Total unadjusted error ±2 LSB Full-scale error ±2 LSB Temperature coefficient of gain Full scale VDD = 14 V to 16.5 V, Vref = 10 V ±20 ppm/ °C Temperature coefficient of gain Zero-code error ±50 µV/°C Linearity error Differential ±1 LSB Digital crosstalk-glitch impulse area 50 nV •s * This parameter is not tested for M suffix devices. |
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