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HT82A821R Datasheet(PDF) 6 Page - Holtek Semiconductor Inc

Part # HT82A821R
Description  USB Audio MCU
Download  39 Pages
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Manufacturer  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

HT82A821R Datasheet(HTML) 6 Page - Holtek Semiconductor Inc

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HT82A821R
Rev. 1.10
6
June 29, 2007
Program Memory
- PROM
The program memory is used to store the program in-
structions which are to be executed. It also contains
data, table, and interrupt entries, and is organized into
2048
´15 bits, addressed by the program counter and ta-
ble pointer.
Certain locations in the program memory are reserved
for special usage:
· Location 000H
This area is reserved for program initialization. After a
chip reset, the program always begins execution at lo-
cation 000H.
· Location 004H
This area is reserved for the USB interrupt service
program. If the USB interrupt is activated, the interrupt
is enabled and the stack is not full, the program begins
execution at location 004H.
· Location 008H
This area is reserved for the Timer/Event Counter 0 in-
terrupt service program. If a timer interrupt results
from a Timer/Event Counter 0 overflow, and if the in-
terrupt is enabled and the stack is not full, the program
begins execution at location 008H.
· Location 00CH
This location is reserved for the Timer/Event Counter
1 interrupt service program. If a timer interrupt results
from a Timer/Event Counter 1 overflow, and the inter-
rupt is enabled and the stack is not full, the program
begins execution at location 00CH.
· Table location
Any location in the program memory can be used as
look-up tables. There are three method to read the
ROM data by two table read instructions:
²TABRDC²
and
²TABRDL², transfer the contents of the
lower-order byte to the specified data memory, and
the higher-order byte to TBLH (08H).
Only the destination of the lower-order byte in the ta-
ble is well-defined, the other bits of the table word are
transferred to the lower portion of TBLH, and the re-
maining 1-bit words are read as
²0². The Table
Higher-order byte register (TBLH) is read only. The ta-
ble pointer (TBLP, TBHP) is a read/write register (07H,
1FH), which indicates the table location. Before ac-
cessing the table, the location must be placed in the
TBLP and TBHP (If the OTP option TBHP is disabled,
the value in TBHP has no effect). The TBLH is read
only and cannot be restored. If the main routine and
the ISR (Interrupt Service Routine) both employ the
table read instruction, the contents of the TBLH in the
main routine are likely to be changed by the table read
instruction used in the ISR. Errors can occur. In other
words, using the table read instruction in the main rou-
tine and the ISR simultaneously should be avoided.
However, if the table read instruction has to be applied
in both the main routine and the ISR, the interrupt
should be disabled prior to the table read instruction. It
will not be enabled until the TBLH has been backed
up. All table related instructions require two cycles to
complete the operation. These areas may function as
normal program memory depending on the require-
ments.
Stack Register
- STACK
This is a special part of the memory which is used to
save the contents of the program counter only. The
stack is organized into 16 levels and is neither part of the
data nor part of the program space, and is neither read-
able nor writeable. The activated level is indexed by the
stack pointer (SP) and is neither readable nor writeable.
At a subroutine call or interrupt acknowledge signal, the
contents of the program counter are pushed onto the
stack. At the end of a subroutine or an interrupt routine,
7 F F H
n F F H
P r o g r a m
M e m o r y
L o o k - u p T a b l e ( 2 5 6 W o r d s )
L o o k - u p T a b l e ( 2 5 6 W o r d s )
N o t e : n r a n g e s f r o m 0 t o 7
0 0 8 H
n 0 0 H
D e v i c e I n i t i a l i z a t i o n P r o g r a m
U S B I n t e r r u p t S u b r o u t i n e
0 0 4 H
0 0 0 H
T i m e r / E v e n t C o u n t e r 0
I n t e r r u p t S u b r o u t i n e
0 0 C H
T i m e r / E v e n t C o u n t e r 1
I n t e r r u p t S u b r o u t i n e
1 5 B i t s
Program Memory
Instruction
Table Location
*10
*9
*8
*7
*6
*5
*4
*3
*2
*1
*0
TABRDC [m]
P10
P9
P8
@7
@6
@5
@4
@3
@2
@1
@0
TABRDL [m]
1
1
1
@7
@6
@5
@4
@3
@2
@1
@0
Table Location
Note: *10~*0: Table location bits
P10~P8: Current program counter bits when TBHP is disabled
@7~@0: TBLP bits
TBHP register bit2~bit0 when TBHP is enabled


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