SH3000EK datasheet(8/24 Pages) SEMTECH

Part #	SH3000EK

Description	Low-Power Programmable Multifunction Support IC for Microcontrollers

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Manufacturer	SEMTECH [Semtech Corporation]

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SH3000 MicroBuddy™

SYSTEM MANAGEMENT

8

V1.15 www.semtech.com

When the HF oscillator is operating alone, it can set

the frequency of the clock on the CLKOUT pin to

±0.025%, and maintain it to ±0.5% over temperature.

This compares favorable with the typical ±0.5% initial

clock accuracy and ±0.6% overall temperature stability

of ceramic resonators. The SH3000 replaces the typical

resonator, using less space and providing better

performance and functionality.

The HF oscillator can also be locked to the internal

32 kHz signal. The absolute accuracy and stability of

the HF clock depends on the quality of the 32.768 kHz

internally generated clock; the low-frequency (LF)

Oscillator System is described later in this document.

When the Real Time Clock module of the SH3000 is

used for high-accuracy timekeeping, an external 32.768

kHz watch crystal used as a reference for RTC provides

excellent accuracy and stability for the Clock

Management System.

The SH3000 employs a Frequency Locked Loop

(FLL) to synchronize the HF clock to the 32 kHz

reference. This architecture has several advantages

over the common PLL (Phase Locked Loop) systems,

including the ability to stop and re-start without

frequency transients or instability, and with instant

settling to a correct frequency. The conventional PLL

approach invariably includes a Low-Pass Filter that

requires a long settling time on re-start.

The primary purpose of the FLL is the maintenance

of the correct frequency while the ambient temperature

is changing. As the temperature drift of the HF oscillator

is quite small, any corrective action from the FLL system

is also small and gradual, commensurate with the

temperature variation.

The FLL system in the SH3000 is unconditionally

stable.

To set a new frequency for the FLL, the host

processor writes the 13-bit Frequency Set value. The

resulting output frequency is calculated using simple

formulas [1] and [2] (reference frequency is 32.768 kHz):

FOSC = 2048 Hz * (Frequency Set value + 1) [1]

FOUT = FOSC / (Post-divider setting) [2]

For example, a post-divider setting of

÷8 and the

Frequency Set value of 4000 (0x0FA0) produce an

output frequency of 1.024 MHz.

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