6

HV6810

HV6810 20-Lead SOW (WG)

Pin

Function

1Q8

High voltage output.

2Q7

3Q6

4

CLOCK

Input data are shifted into the data shift register on the thepostive edge of the clock.

5

VSS

Usually V

6

N/C

No connection.

7

VDD

Low voltage power supply.

8

LE (STROBE)

When LE is high, data is transferred from data shift register to the Q output latch.

When LE is low, data is latched into data latches and new data can be clocked into

the shift register

9Q5

High voltage output.

10

Q4

11

Q3

12

Q2

13

Q1

14

BLANKING

When blanking is low, all Q’s are forced to a high state, regardless of data in each

channel. When OL is low, all Q’s are forced to a low state, regardless of data in each

channel.

15

DATA IN

Input data for the input shift register.

16

VBB

High voltage power supply.

17

SERIAL DATA OUT

Output data from the shift register.

18

N/C

No connection.

19

Q10

High voltage output.

20

Q9

Pin Descriptions