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SC1470 Datasheet(PDF) 10 Page - Semtech Corporation |
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SC1470 Datasheet(HTML) 10 Page - Semtech Corporation |
10 / 25 page 10 2005 Semtech Corp. www.semtech.com SC1470 POWER MANAGEMENT The IC duty-factor limitation is given by: ) MAX ( OFF t ) MIN ( ON t ) MIN ( ON t DUTY + = Be sure to include inductor resistance and MOSFET on- state voltage drops when performing worst-case dropout duty-factor calculations. SC1470 System DC Accuracy Two IC parameters affect system DC accuracy, the error comparator threshold voltage variation and the switching frequency variation with line and load. The error comparator threshold does not drift significantly with supply and temperature. Thus, the error comparator contributes 1% or less to DC system inaccuracy. Board components and layout also influence DC accuracy. The use of 1% feedback resistors contribute 1%. If tighter DC accuracy is required use 0.1% feedback resistors. The on pulse in the SC1470 is calculated to give a pseudo fixed frequency. Nevertheless, some frequency variation with line and load can be expected. This variation changes the output ripple voltage. Because constant on regulators regulate to the valley of the output ripple, ½ of the output ripple appears as a DC regulation error. For example, if the feedback resistors are chosen to divide down the output by a factor of five, the valley of the output ripple will be VOUT. For example: if VOUT is 2.5V and the ripple is 50mV with VBAT = 6V, then the measured DC output will be 2.525V. If the ripple increases to 80mV with VBAT = 25V, then the measured DC output will be 2.540V. The output inductor value may change with current. This will change the output ripple and thus the DC output voltage. It will not change the frequency. Switching frequency variation with load can be minimized by choosing MOSFETs with lower R DS(ON). High RDS(ON) MOSFETs will cause the switching frequency to increase as the load current increases. This will reduce the ripple and thus the DC output voltage. Design Procedure Prior to designing an output and making component selections, it is necessary to determine the input voltage range and the output voltage specifications. For purposes of demonstrating the procedure the output for the schematic in Figure 4 on Page 15 will be designed. The maximum input voltage (V BAT(MAX)) is determined by the highest AC adaptor voltage. The minimum input voltage (V BAT(MIN)) is determined by the lowest battery voltage after accounting for voltage drops due to connectors, fuses and battery selector switches. For the purposes of this design example we will use a V BAT range of 8V to 20V. Four parameters are needed for the output: 1) nominal output voltage, V OUT (we will use 1.2V) 2) static (or DC) tolerance, TOL ST (we will use +/-4%) 3) transient tolerance, TOL TR and size of transient (we will use +/-8% and 6A for purposes of this demonstration). 4) maximum output current, I OUT (we will design for 6A) Switching frequency determines the trade-off between size and efficiency. Increased frequency increases the switching losses in the MOSFETs, since losses are a function of VIN2. Knowing the maximum input voltage and budget for MOSFET switches usually dictates where the design ends up. A default R tON value of 1MΩ is suggested as a starting point, but this is not set in stone. The first thing to do is to calculate the on-time, t ON, at VBAT(MIN) and V BAT(MAX), since this depends only upon VBAT, VOUT and RtON. For V OUT < 3.3V: () s 10 50 V V 10 37 R 10 3 . 3 t 9 ) MIN ( BAT OUT 3 tON 12 ) MIN ( VBAT _ ON − − • + • • + • • = and () s 10 50 V V 10 37 R 10 3 . 3 t 9 ) MAX ( BAT OUT 3 tON 12 ) MAX ( VBAT _ ON − − • + • • + • • = From these values of t ON we can calculate the nominal switching frequency as follows: () Hz t V V f ) MIN ( VBAT _ ON ) MIN ( BAT OUT ) MIN ( VBAT _ SW • = and () Hz t V V f ) MAX ( VBAT _ ON ) MAX ( BAT OUT ) MAX ( VBAT _ SW • = t ON is generated by a one-shot comparator that samples |
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