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DG401AK883 Datasheet(PDF) 2 Page - TEMIC Semiconductors |
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DG401AK883 Datasheet(HTML) 2 Page - TEMIC Semiconductors |
2 / 10 page DG403 D1 S1 NC Dual-In-Line and SOIC IN1 D3 V– S3 GND S4 VL D4 V+ NC IN2 D2 S2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Top View D3 NC V– S2 S3 IN2 GND NC NC D2 NC NC S4 S1 VL IN1 D4 NC V+ D1 Key Top View LCC 910 11 12 13 4 5 6 7 8 1 2 319 20 14 15 16 17 18 DG403 DG405 D1 S1 NC Dual-In-Line and SOIC IN1 D3 V– S3 GND S4 VL D4 V+ NC IN2 D2 S2 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Top View D3 NC V– S2 S3 IN2 GND NC NC D2 NC NC S4 S1 VL IN1 D4 NC V+ D1 Key Top View LCC 910 11 12 13 4 5 6 7 8 1 2 319 20 14 15 16 17 18 DG405 DG401/403/405 2 Siliconix S-53748—Rev. E, 05-Jun-97 Functional Block Diagrams and Pin Configurations (Cont’d) Two SPDT Switches per Package Truth Table Logic SW1, SW2 SW3, SW4 0 OFF ON 1 ON OFF Logic “0” v 0.8 V Logic “1” w 2.4 V Logic 1 w 2.4 V Two DPST Switches per Package Truth Table Logic Switch 0 OFF 1 ON Logic “0” v 0.8 V Logic “1” w 2.4 V Logic 1 w 2.4 V |
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