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AT503 Datasheet(PDF) 1 Page - Power Semiconductors |
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AT503 Datasheet(HTML) 1 Page - Power Semiconductors |
1 / 4 page PHASE CONTROL THYRISTOR AT503 Repetitive voltage up to 1600 V Mean on-state current 445 A Surge current 6.4 kA FINAL SPECIFICATION gen 03 - ISSUE : 03 Symbol Characteristic Conditions Tj [°C] Value Unit BLOCKING V RRM Repetitive peak reverse voltage 125 1600 V V RSM Non-repetitive peak reverse voltage 125 1700 V V DRM Repetitive peak off-state voltage 125 1600 V I RRM Repetitive peak reverse current V=VRRM 125 30 mA I DRM Repetitive peak off-state current V=VDRM 125 30 mA CONDUCTING I T (AV) Mean on-state current 180° sin, 50 Hz, Th=55°C, double side cooled 445 A I T (AV) Mean on-state current 180° sin, 50 Hz, Tc=85°C, double side cooled 355 A I TSM Surge on-state current sine wave, 10 ms 125 6.4 kA I² t I² t without reverse voltage 205 x1E3 A²s V T On-state voltage On-state current = 800 A 25 1.45 V V T(TO) Threshold voltage 125 0.9 V r T On-state slope resistance 125 0.680 mohm SWITCHING di/dt Critical rate of rise of on-state current, min. From 75% VDRM up to 500 A, gate 10V 5ohm 125 200 A/µs dv/dt Critical rate of rise of off-state voltage, min. Linear ramp up to 70% of VDRM 125 500 V/µs td Gate controlled delay time, typical VD=100V, gate source 10V, 10 ohm , tr=.5 µs 25 1.6 µs tq Circuit commutated turn-off time, typical dV/dt = 20 V/µs linear up to 75% VDRM 200 µs Q rr Reverse recovery charge di/dt=-20 A/µs, I= 330A 125 µC I rr Peak reverse recovery current VR= 50 V A I H Holding current, typical VD=5V, gate open circuit 25 300 mA I L Latching current, typical VD=5V, tp=30µs 25 700 mA GATE V GT Gate trigger voltage VD=5V 25 3.5 V I GT Gate trigger current VD=5V 25 200 mA V GD Non-trigger gate voltage, min. VD=VDRM 125 0.25 V V FGM Peak gate voltage (forward) 20 V I FGM Peak gate current 8A V RGM Peak gate voltage (reverse) 5V P GM Peak gate power dissipation Pulse width 100 µs 75 W P G Average gate power dissipation 1 W MOUNTING R th(j-h) Thermal impedance, DC Junction to heatsink, double side cooled 95 °C/kW R th(c-h) Thermal impedance Case to heatsink, double side cooled 20 °C/kW T j Operating junction temperature -30 / 125 °C F Mounting force 4.9 / 5.9 kN Mass 55 g ORDERING INFORMATION : AT503 S 16 standard specification VDRM&VRRM/100 POSEICO SPA POwer SEmiconductors Italian COrporation POSEICO POSEICO SPA Via N. Lorenzi 8, 16152 Genova - ITALY Tel. ++ 39 010 6556234 - Fax ++ 39 010 6557519 Sales Office: Tel. ++ 39 010 6556775 - Fax ++ 39 010 6442510 |
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