YMF781

9

・

Clock Sync Serial Interface

Ｉ

tem

Symbol

Ｍ

in.

Ｔ

yp.

Ｍ

ax.

Ｕ

nit

SCLKN frequency (Serial transfer speed)

1

2

MHz

SCLKN High time

220

ns

SCLKN Low time

220

ns

SDI set-up time

0

ns

SDI hold time

75

ns

SDO output delay time

200

ns

SDO output hold time (*1)

110

ns

SRDYN output delay time (L→H) (*2)

300

ns

(*1) The last SDO output data is held until the next SCLKN falling edge is detected.

(*2) Time to the High level in synchronization with SCLKN, when the first 1 bit is transmitted or received.

The falling timing depends on the transmit/receive process of the internal Control CPU.

Input Signals

except XI

XI

SCLKN

SDI

SDO

SRDYN