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GAL22LV10 Datasheet(PDF) 9 Page - Lattice Semiconductor

Part # GAL22LV10
Description  Low Voltage E2CMOS PLD Generic Array Logic?
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Manufacturer  LATTICE [Lattice Semiconductor]
Direct Link  http://www.latticesemi.com
Logo LATTICE - Lattice Semiconductor

GAL22LV10 Datasheet(HTML) 9 Page - Lattice Semiconductor

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Specifications GAL22LV10
9
Specifications GAL22LV10C
tpd2
A
Input or I/O to Combinatorial Output
2
7.5
2
10
2
15
ns
tco2
A
Clock to Output Delay
1
5
1
6.5
1
10
ns
tcf3
Clock to Feedback Delay
3
5
5
ns
tsu
Setup Time, Input or Fdbk before Clk
6.5
7.5
10
ns
th
Hold Time, Input or Fdbk after Clk
0—
0
0
ns
A
Maximum Clock Frequency with
87
71
50
MHz
External Feedback, 1/(tsu + tco)
fmax4
A
Maximum Clock Frequency with
105
80
66
MHz
Internal Feedback, 1/(tsu + tcf)
A
Maximum Clock Frequency with
125
111
83
MHz
No Feedback
twh
Clock Pulse Duration, High
3.5
4
6
ns
twl
Clock Pulse Duration, Low
3.5
4
6
ns
ten
B
Input or I/O to Output Enabled
2
10
2
12
2
15
ns
tdis
C
Input or I/O to Output Disabled
2
10
2
12
2
15
ns
tar
A
Input or I/O to Asynch. Reset of Reg.
2
11
2
13
2
20
ns
tarw
Asynch. Reset Pulse Duration
7
8
12
ns
tarr
Asynch. Reset to Clk
↑ Recovery Time
7
8
10
ns
tspr
Synch. Preset to Clk
↑ Recovery Time
8
10
10
ns
-15
MIN. MAX.
-10
MIN. MAX.
UNITS
PARAM
TEST
COND.1
DESCRIPTION
COM
COM
Over Recommended Operating Conditions
AC SWITCHING CHARACTERISTICS
-7
MIN. MAX.
COM
1) Refer to Switching Test Conditions section.
2) Minimum values for tpd and tco are not 100% tested but established by characterization.
3) Calculated from fmax with internal feedback. Refer to fmax Description section.
4) Refer to fmax Description section.
SYMBOL
PARAMETER
TYPICAL
UNITS
TEST CONDITIONS
C
I
Input Capacitance
8
pF
V
CC = 3.3V, VI = 0V
C
I/O
I/O Capacitance
8
pF
V
CC = 3.3V, VI/O = 0V
CAPACITANCE (T
A = 25°C, f = 1.0 MHz)


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