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M52D32162A-7.5BG Datasheet(PDF) 5 Page - Elite Semiconductor Memory Technology Inc. |
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M52D32162A-7.5BG Datasheet(HTML) 5 Page - Elite Semiconductor Memory Technology Inc. |
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5 / 30 page  ESMT M52D32162A Elite Semiconductor Memory Technology Inc. Publication Date : May. 2007 Revision : 1.4 5/30 DC CHARACTERISTICS (Recommended operating condition unless otherwise noted, TA = 0 C ° ~ 70 C ° ) Version Parameter Symbol Test Condition CAS Latency -7.5 -10 Unit Note Operating Current (One Bank Active) ICC1 Burst Length = 1 tRC ≥ tRC (min), tCC ≥ tCC (min), IOL= 0mA 55 35 mA 1 ICC2P CKE ≤ VIL(max), tCC =15ns 0.3 mA Precharge Standby Current in power-down mode ICC2PS CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞ 0.2 mA ICC2N CKE ≥ VIH(min), CS ≥ VIH(min), tCC =15ns Input signals are changed one time during 30ns 3 mA Precharge Standby Current in non power-down mode ICC2NS CKE ≥ VIH(min), CLK ≤ VIL(max), tCC = ∞ Input signals are stable 1 mA ICC3P CKE ≤ VIL(max), tCC =15ns 1.5 Active Standby Current in power-down mode ICC3PS CKE ≤ VIL(max), CLK ≤ VIL(max), tCC = ∞ 1 mA ICC3N CKE ≥ VIH(min), CS ≥ VIH(min), tCC=15ns Input signals are changed one time during 30ns 10 mA Active Standby Current in non power-down mode (One Bank Active) ICC3NS CKE ≥ VIH (min), CLK ≤ VIL(max), tCC= ∞ Input signals are stable 2.5 mA Operating Current (Burst Mode) ICC4 IOL= 0Ma, Page Burst All Band Activated, tCCD = tCCD (min) 70 60 mA 1 Refresh Current ICC5 tRC ≥ tRC(min) 40 40 mA 2 TCSR range 45 70 C ° 2 Banks 180 200 Self Refresh Current ICC6 CKE ≤ 0.2V 1 Bank 160 180 uA Deep Power Down Current ICC7 CKE ≤ 0.2V 10 uA Note: 1.Measured with outputs open. Addresses are changed only one time during tCC(min). 2.Refresh period is 64ms. Addresses are changed only one time during tCC(min). |
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