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AD9984AKSTZ-140 Datasheet(PDF) 3 Page - Analog Devices |
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AD9984AKSTZ-140 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 44 page  AD9984A Rev. 0 | Page 3 of 44 SPECIFICATIONS ANALOG INTERFACE CHARACTERISTICS VD = 1.8 V, VDD = 3.3 V, PVD = 1.8 V, DAVDD = 1.8 V, ADC clock = maximum conversion rate, full temperature range = 0°C to 70°C. Table 1. Electrical Characteristics AD9984AKSTZ-140 AD9984AKCPZ-140 AD9984AKSTZ-170 AD9984AKCPZ-170 Parameter Temp Test Level1 Min Typ Max Min Typ Max Unit RESOLUTION Number of Bits 10 10 Bits LSB Size 0.098 0.098 % of full scale (FS) DC ACCURACY Differential Nonlinearity 25°C I ±0.6 +1.8/−1.0 ±0.7 +1.9/−1.0 LSB Full VI +1.9/−1.0 +2.0/−1.0 LSB Integral Nonlinearity 25°C I ±2.35 ±7.0 ±2.35 ±8.5 LSB Full VI ±9.0 ±9.0 LSB No Missing Codes Full VI GNT2 GNT2 ANALOG INPUT Input Voltage Range Minimum Full VI 0.5 0.5 V p-p Maximum Full VI 1.0 1.0 V p-p Gain Tempco 25°C V 125 125 ppm/°C Input Bias Current 25°C IV 1 1 μA Full IV 1 1 μA Input Full-Scale Matching Full VI 1 1 % FS Offset Adjustment Range Full VI 50 50 % FS SWITCHING PERFORMANCE Maximum Conversion Rate Full VI 140 170 MSPS Minimum Conversion Rate Full IV 10 10 MSPS Clock to Data Skew (tSKEW) Full IV −0.5 +2.0 −0.5 +2.0 ns tBUFF Full VI 4.7 4.7 μs tSTAH Full VI 4.0 4.0 μs tDHO Full VI 0 0 μs tDAL Full VI 4.7 4.7 μs tDAH Full VI 4.0 4.0 μs tDSU Full VI 250 250 ns tSTASU Full VI 4.7 4.7 μs tSTOSU Full VI 4.0 4.0 μs Maximum PLL Clock Rate Full VI 140 170 MHz Minimum PLL Clock Rate Full IV 10 10 MHz Sampling Phase Tempco Full IV 15 15 ps/°C DIGITAL INPUTS Input Voltage, High (VIH) Full VI 1.0 1.0 V Input Voltage, Low (VIL) Full VI 0.8 0.8 V Input Current, High (IIH) Full V −1.0 −1.0 μA Input Current, Low (IIL) Full V 1.0 1.0 μA Input Capacitance 25°C V 2 2 pF DIGITAL OUTPUTS Output Voltage, High (VOH) Full VI VDD − 0.1 VDD − 0.1 V Output Voltage, Low (VOL) Full VI 0.1 0.1 V Duty Cycle (DATACK) Full IV 45 50 55 45 50 55 % Output Coding Binary Binary |
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