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KK4024B Datasheet(PDF) 4 Page - KODENSHI_AUK CORP.

Part # KK4024B
Description  7 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS
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Manufacturer  KODENSHI [KODENSHI_AUK CORP.]
Direct Link  http://www.kodenshi.co.kr
Logo KODENSHI - KODENSHI_AUK CORP.

KK4024B Datasheet(HTML) 4 Page - KODENSHI_AUK CORP.

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KK4024B
AC ELECTRICAL CHARACTERISTICS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
≥-55°C
25
°C
≤125°C
Unit
tPLH, tPHL
Maximum Propagation Delay, Clock to Q1
(Figure 1)
5.0
10
15
360
160
130
360
160
130
720
320
260
ns
tPLH, tPHL
Maximum Propagation Delay, Qn to Qn+1
(Figure 3)
5.0
10
15
330
80
60
330
80
60
660
160
120
ns
tPHL
Maximum Propagation Delay, Reset to Any Q
(Figure 2)
5.0
10
15
280
120
100
280
120
100
560
240
200
ns
tTLH, tTHL
Maximum Output Transition Time (Figure 1)
5.0
10
15
200
100
80
200
100
80
400
200
160
ns
fmax
Maximum Clock Frequency(Figure 1)
5.0
10
15
3.5
8
12
3.5
8
12
1.75
4
6
MHz
CIN
Maximum Input Capacitance
-
7.5
pF
TIMING REQUIREMENTS (CL=50pF, RL=200kΩ, Input tr=tf=20 ns)
VCC
Guaranteed Limit
Symbol
Parameter
V
≥-55°C
25
°C
≤125°C
Unit
tw
Minimum Pulse Width, Clock (Figure 1)
5.0
10
15
140
60
40
140
60
40
280
120
80
ns
tw
Minimum Pulse Width, Reset (Figure 2)
5.0
10
15
200
80
60
200
80
60
400
160
120
ns
trem
Minimum Removal Time, Reset(Figure 2)
5.0
10
15
350
150
100
350
150
100
700
300
200
ns
tr, tf
Maximum Input Rise and Fall Times, Clock
(Figure 1)
5.0
10
15
Unlimited
µs
4


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