 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
WM8805 Datasheet(PDF) 9 Page - Wolfson Microelectronics plc |
|
||||||||||||||||||||||||||||||
WM8805 Datasheet(HTML) 9 Page - Wolfson Microelectronics plc |
|
|
9 / 65 page  Production Data WM8805 w PD Rev 4.1 September 07 9 CONTROL INTERFACE – 3-WIRE MODE Figure 4 Control Interface Timing – 3-Wire Serial Control Mode Test Conditions PVDD = 3.3V, DVDD = 3.3V, PGND = 0V, DGND = 0V, TA = +25 oC, fs = 48kHz, MCLK = 256fs unless stated. PARAMETER SYMBOL MIN TYP MAX UNIT Program Register Input Information SCLK rising edge to CSB rising edge tSCS 60 ns SCLK cycle time tSCY 80 ns SCLK duty cycle 40/60 60/40 % SDIN to SCLK set-up time tDSU 20 ns SDIN hold time from SCLK rising edge tDHO 20 ns SDOUT propagation delay from SCLK rising edge tDL 5 ns CSB pulse width high tCSH 20 ns CSB rising/falling to SCLK rising tCSS 20 ns SCLK glitch suppression tps 2 8 ns Table 4 Control Interface Timing – 3-Wire Serial Control Mode |
Similar Part No. - WM8805 |
|
Similar Description - WM8805 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
