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PI2EQX3201ZFE Datasheet(PDF) 6 Page - Pericom Semiconductor Corporation |
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PI2EQX3201ZFE Datasheet(HTML) 6 Page - Pericom Semiconductor Corporation |
6 / 7 page 6 PS8818 02/28/06 PI2EQX3201 3.2Gbps 2 Differential Channel Serial Re-driver with built-in Equalization and De-emphasis AC Switching Characteristics for Clock Buffer (VDD = 1.8 ±0.1V, AVDD = 1.8 ±0.1V) (3) Symbol Parameters Min Max. Units Notes Trise / Tfall Rise and Fall Time (measured between 0.175V to 0.525V) (1) 125 525 ps 1 ΔTrise / ΔTfall Rise and Fall Time Variation 75 1 VHIGH Voltage High including overshoot 660 900 mV 1 VLOW Voltage Low including undershoot -200 1 VCROSS Absolute crossing point voltages 200 550 1 ΔVCROSS Total Variation of Vcross over all edges 250 1 TDC Duty Cycle (input duty cycle = 50%) (2) 45 55 % 2 Notes: 1. Measurement taken from Single Ended waveform. 2. Measurement taken from Differential waveform. 3. Test configuration is RS = 33.2Ω, Rp = 49.9Ω, and 2pF. Configuration Test Load Board Termination Figure 2. Configuration test load board termination Note: • TLA and TLB are 3” transmission lines. Rs 33Ω 5% Rs 33Ω 5% Rp 49.9Ω 1% 475Ω 1% Rp 49.9Ω 1% 2pF 5% 2pF 5% Clock# Clock TLA TLB CLKBUF 06-0086 |
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