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W83977EF-AW Datasheet(PDF) 74 Page - Winbond |
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W83977EF-AW Datasheet(HTML) 74 Page - Winbond |
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74 / 142 page  W83977EF-AW/W83977EG-AW -72- HGA20 (Hardware GATE A20) A "1" on this bit selects hardware GATEA20 control logic to control GATE A20 signal. A "0" on this bit disables hardware GATEA20 control logic function. HKBRST (Hardware Keyboard Reset) A "1" on this bit selects hardware KB RESET control logic to control KBRESET signal. A "0" on this bit disables hardware KB RESET control logic function. When the KBC receives data that follows a "D1" command, the hardware control logic sets or clears GATE A20 according to the received data bit 1. Similarly, the hardware control logic sets or clears KBRESET depending on the received data bit 0. When the KBC receives a "FE" command, the KBRESET is pulse low for 6 μS(Min.) with 14μS(Min.) delay. GATEA20 and KBRESET are controlled by either the software control or the hardware control logic and they are mutually exclusive. Then, GATEA20 and KBRESET are merged along with Port92 when P92EN bit is set. 8.5.2 Port 92 Control Register (Default Value = 0x24) BIT 7 6 5 4 3 2 1 0 NAME Res. (0) Res. (0) Res. (1) Res. (0) Res. (0) Res. (1) SGA20 PLKBRST SGA20 (Special GATE A20 Control) A "1" on this bit drives GATE A20 signal to high. A "0" on this bit drives GATE A20 signal to low. PLKBRST (Pull-Low KBRESET) A "1" on this bit causes KBRESET to drive low for 6 μS(Min.) with 14μS(Min.) delay. Before issuing another keyboard reset command, the bit must be cleared. |
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