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FSDM0765RB Datasheet(PDF) 4 Page - Fairchild Semiconductor |
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FSDM0765RB Datasheet(HTML) 4 Page - Fairchild Semiconductor |
4 / 22 page © 2007 Fairchild Semiconductor Corporation www.fairchildsemi.com FSQ0565R, FSQ0765R Rev. 1.0.0 4 Pin Configuration Figure 3. Pin Configuration (Top View) Pin Definitions Pin # Name Description 1Drain SenseFET drain. High-voltage power SenseFET drain connection. 2GND Ground. This pin is the control ground and the SenseFET source. 3VCC Power Supply. This pin is the positive supply input. This pin provides internal operating cur- rent for both start-up and steady-state operation. 4FB Feedback. This pin is internally connected to the inverting input of the PWM comparator. The collector of an opto-coupler is typically tied to this pin. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 6V, the overload pro- tection triggers, which shuts down the FPS. 5 Sync Sync. This pin is internally connected to the sync-detect comparator for quasi-resonant switch- ing. In normal quasi-resonant operation, the threshold of the sync comparator is 1.2V/1.0V. 6Vstr Start-up. This pin is connected directly, or through a resistor, to the high-voltage DC link. At start-up, the internal high-voltage current source supplies internal bias and charges the exter- nal capacitor connected to the VCC pin. Once VCC reaches 12V, the internal current source is disabled. It is not recommended to connect Vstr and Drain together. 6. V str 5. Sync 4. FB 3. V CC 2. GND 1. Drain FSQ0765R Rev.00 |
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