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MB90F867ES Datasheet(PDF) 4 Page - Fujitsu Component Limited.

Part # MB90F867ES
Description  16-bit Proprietary Microcontroller
Download  67 Pages
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Manufacturer  FUJITSU [Fujitsu Component Limited.]
Direct Link  http://edevice.fujitsu.com/fmd/en/index.html
Logo FUJITSU - Fujitsu Component Limited.

MB90F867ES Datasheet(HTML) 4 Page - Fujitsu Component Limited.

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MB90860E Series
4
■ PRODUCT LINEUP
(Continued)
MB90867E(S)
MB90F867E(S)
MB90V340E-101/102
CPU
F2MC-16LX CPU
Type
MASK ROM product
Flash memory product
Evaluation product
System clock
On-chip PLL clock multiplier (
×1, ×2, ×3, ×4, ×6, 1/2 when PLL stops)
Minimum instruction execution time : 42 ns (4 MHz osc. PLL
× 6)
ROM
MASK ROM
128 Kbytes
Flash memory
128 Kbytes
External
RAM
6 Kbytes
6 Kbytes
30 Kbytes
Emulator-specific
power supply*1
Yes
Technology
0.35
µm CMOS with on-chip
voltage regulator for internal
power supply
0.35
µm CMOS with on-chip
voltage regulator for internal
power supply + Flash memory
with on-chip charge pump for
programming voltage
0.35
µm CMOS with on-chip
voltage regulator for internal
power supply
Operating
voltage range
3.5 V to 5.5 V : at normal operating (not using A/D converter)
4.0 V to 5.5 V : at using A/D converter/Flash programming
4.5 V to 5.5 V : at using external bus
5 V
± 10%
Temperature range
−40 °C to +105 °C
Package
QFP-100, LQFP-100
PGA-299
UART
4 channels
5 channels
Wide range of baud rate settings using a dedicated reload timer
Special synchronous options for adapting to different synchronous serial protocols
LIN functionality working either as master or slave LIN device
I2C (400 kbps)
2 channels
8/10-bit
A/D converter
24 channels
10-bit or 8-bit resolution
Conversion time : Min 3
µs include sample time (per one channel)
16-bit reload timer
(4 channels)
Operation clock frequency : fsys/21, fsys/23, fsys/25 (fsys
= Machine clock frequency)
Supports External Event Count function
16-bit
I/O timer
(2 channels)
Signals an interrupt when overflowing
Supports Timer Clear when a match with Output Compare (ch.0, ch.4)
Operation clock freq. : fsys, fsys/21, fsys/22, fsys/23, fsys/24, fsys/25, fsys/26, fsys/27
(fsys
= Machine clock freq.)
I/O Timer 0 (clock input FRCK0) corresponds to ICU 0/1/2/3, OCU 0/1/2/3
I/O Timer 1 (clock input FRCK1) corresponds to ICU 4/5/6/7, OCU 4/5/6/7
16-bit output
compare
(8 channels)
Signals an interrupt when 16-bit I/O Timer match output compare registers.
A pair of compare registers can be used to generate an output signal.
16-bit input capture
(8 channels)
Rising edge, falling edge or rising & falling edge sensitive
Signals an interrupt upon external event
Part Number
Parameter


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