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MB88346BPFV Datasheet(PDF) 5 Page - Fujitsu Component Limited. |
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MB88346BPFV Datasheet(HTML) 5 Page - Fujitsu Component Limited. |
5 / 18 page MB88346B 5 ■ DATA FOR CHIP CONTROL 1. Data for Shift Register • The chip is controlled by 12 bits of data input to the shift register. • The shift register inputs a total of 12 bits of data consisting of a four-bit address selection signal and an eight- bit D/A converter control signal. • A data to the shift register is inputted to the DI pin in the order of D11 (MSB) to D0 (LSB) . 2. D/A Converter Control Signal VREF = VDD - VSS Input data signal D/A converter output voltage D0 D1 D2 D3 D4 D5 D6 D7 00000000 ≅ VSS 10000000 ≅ VREF / 255 × 1 + VSS 01000000 ≅ VREF / 255 × 2 + VSS 11000000 ≅ VREF / 255 × 3 + VSS 01111111 ≅ VREF / 255 × 254 + VSS 11111111 ≅ VDD D0 Last (LSB) First (MSB) D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D/A converter control signal Address selected signal |
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