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CY62256VN
Document #: 001-06512 Rev. *A
Page 6 of 12
Switching Waveforms
Read Cycle No. 1[12, 13]
Read Cycle No. 2[13, 14]
Write Cycle No. 1 (WE Controlled)[10, 15, 16]
Notes:
12. Device is continuously selected. OE, CE = VIL.
13. WE is HIGH for read cycle.
14. Address valid prior to or coincident with CE transition LOW.
15. Data I/O is high impedance if OE = VIH.
16. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
17. During this period, the I/Os are in output state and input signals should not be applied.
ADDRESS
DATA OUT
PREVIOUS DATA VALID
DATA VALID
tRC
tAA
tOHA
50%
50%
DATA VALID
tRC
tACE
tDOE
t LZOE
tLZCE
t PU
DATA OUT
HIGH IMPEDANCE
IMPEDANCE
ICC
ISB
tHZOE
tHZCE
tPD
OE
CE
HIGH
VCC
SUPPLY
CURRENT
tHD
tSD
t PWE
tSA
tHA
tAW
tWC
DATA I/O
ADDRESS
CE
WE
OE
t HZOE
DATAINVALID
NOTE 17
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