8-Mbit (512K x 16) Static RAM
CY62157E MoBL®
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 38-05695 Rev. *E
Revised April 27, 2007
Features
• Very high speed: 45 ns
— Industrial: –40°C to +85°C
— Automotive-E: –40°C to +125°C
• Wide voltage range: 4.5V–5.5V
• Ultra low standby power
— Typical Standby current: 2
µA
— Maximum Standby current: 8
µA (Industrial)
• Ultra low active power
— Typical active current: 1.8 mA @ f = 1 MHz
• Ultra low standby power
• Easy memory expansion with CE1, CE2 and OE features
• Automatic power down when deselected
• CMOS for optimum speed and power
• Available in Pb-free 44-pin TSOP II and 48-ball VFBGA
package
Functional Description[1]
The CY62157E is a high performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra low active current.
This is ideal for providing More Battery Life
™ (MoBL®) in
portable applications such as cellular telephones. The device
also has an automatic power down feature that significantly
reduces power consumption when addresses are not toggling.
Place the device into standby mode when deselected (CE1
HIGH or CE2 LOW or both BHE and BLE are HIGH). The input
or output pins (IO0 through IO15) are placed in a high
impedance state when:
• Deselected (CE1HIGH or CE2 LOW)
• Outputs are disabled (OE HIGH)
• Both Byte High Enable and Byte Low Enable are disabled
(BHE, BLE HIGH)
• Write operation is active (CE1 LOW, CE2 HIGH and WE
LOW)
To write to the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from IO pins (IO0 through IO7), is
written into the location specified on the address pins (A0
through A18). If Byte High Enable (BHE) is LOW, then data
from IO pins (IO8 through IO15) is written into the location
specified on the address pins (A0 through A18).
To read from the device, take Chip Enable (CE1 LOW and CE2
HIGH) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
appear on IO0 to IO7. If Byte High Enable (BHE) is LOW, then
data from memory appears on IO8 to IO15. See the “Truth
Table” on page 9 for a complete description of read and write
modes.
Logic Block Diagram
512K x 16
RAM Array
IO0–IO7
A8
A7
A6
A5
A2
COLUMN DECODER
DATA IN DRIVERS
OE
A4
A3
IO8–IO15
WE
BLE
BHE
A0
A1
A9
A10
CE2
CE1
Power Down
Circuit
BHE
BLE
CE2
CE1
Notes
1. For best practice recommendations, please refer to the Cypress application note AN1064, SRAM System Guidelines.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
