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Document #: 001-08029 Rev. *E
Page 4 of 13
CY62138FV30 MoBL®
Thermal Resistance [8]
Parameter
Description
Test Conditions
SOIC
VFBGA
TSOP II
STSOP
TSOP I Unit
ΘJA
Thermal Resistance
(Junction to Ambient)
Still air, soldered on a 3 x 4.5
inch, two layer printed circuit
board
44.53
38.49
44.16
59.72
50.19
°C/W
ΘJC
Thermal Resistance
(Junction to Case)
24.05
17.66
11.97
15.38
14.59
°C/W
AC Test Loads and Waveforms
Parameters
2.5V (2.2V to 2.7V)
3.0V (2.7V to 3.6V)
Unit
R1
16667
1103
Ω
R2
15385
1554
Ω
RTH
8000
645
Ω
VTH
1.20
1.75
V
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
Min
Typ [3]
Max
Unit
VDR
VCC for Data Retention
1.5
V
ICCDR [7]
Data Retention Current
VCC = 1.5V,
CE1 > VCC − 0.2V or CE2 < 0.2V,
VIN > VCC − 0.2V or VIN < 0.2V
14
µA
tCDR [8]
Chip Deselect to Data Retention Time
0
ns
tR [9]
Operation Recovery Time
tRC
ns
Data Retention Waveform [10]
VCC
VCC
OUTPUT
R2
30 pF
INCLUDING
JIG AND
SCOPE
GND
90%
10%
90%
10%
Rise Time = 1 V/ns
Fall Time = 1 V/ns
OUTPUT
V
Equivalent to:
THEVENIN
EQUIVALENT
ALL INPUT PULSES
RTH
R1
VCC(min)
VCC(min)
tCDR
VDR > 1.5V
DATA RETENTION MODE
tR
VCC
CE
Notes:
9. Full device AC operation requires linear VCC ramp from VDR to VCC(min) > 100 µs or stable at VCC(min) > 100 µs.
10. CE is the logical combination of CE1 and CE2. When CE1 is LOW and CE2 is HIGH, CE is LOW; when CE1 is HIGH or CE2 is LOW, CE is HIGH.
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