Document #: 38-05579 Rev. *C
Page 3 of 11
CY62128EV30 MoBL®
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ..................................–65°C to +150°C
Ambient Temperature with
Power Applied...............................................55°C to +125°C
Supply Voltage to Ground
Potential ......................................... –0.3V to VCC(max) + 0.3V
DC Voltage Applied to Outputs
in High-Z State[4, 5]......................... –0.3V to VCC(max) + 0.3V
DC Input Voltage[4,5] ...................... –0.3V to VCC(max) + 0.3V
Output Current into Outputs (LOW)............................. 20 mA
Static Discharge Voltage.......................................... > 2001V
(MIL-STD-883, Method 3015)
Latch up Current..................................................... > 200 mA
Operating Range
Device
Range
Ambient
Temperature
VCC[6]
CY62128EV30LL Ind’l/Auto-A
–40°C to +85°C 2.2V to
3.6V
Auto-E
–40°C to +125°C
Electrical Characteristics (Over the Operating Range)
Parameter
Description
Test Conditions
45 ns (Ind’l/Auto-A)
55 ns (Auto-E)
Unit
Min
Typ[3]
Max
Min
Typ[3]
Max
VOH
Output HIGH Voltage
IOH = –0.1 mA
2.0
2.0
V
IOH = –1.0 mA, VCC > 2.70V
2.4
2.4
V
VOL
Output LOW Voltage
IOL = 0.1 mA
0.4
0.4
V
IOL = 2.1 mA, VCC > 2.70V
0.4
0.4
V
VIH
Input HIGH Voltage
VCC = 2.2V to 2.7V
1.8
VCC +
0.3V
1.8
VCC +
0.3V
V
VCC= 2.7V to 3.6V
2.2
VCC +
0.3V
2.2
VCC +
0.3V
V
VIL
Input LOW Voltage
VCC = 2.2V to 2.7V
–0.3
0.6
–0.3
0.6
V
VCC= 2.7V to 3.6V
–0.3
0.8
–0.3
0.8
V
IIX
Input Leakage Current
GND < VI < VCC
–1
+1
–4
+4
µA
IOZ
Output Leakage Current GND < VO < VCC, Output Disabled
–1
+1
–4
+4
µA
ICC
VCC Operating Supply
Current
f = fmax = 1/tRC VCC = VCCmax
IOUT = 0 mA
CMOS levels
11
16
11
35
mA
f = 1 MHz
1.3
2.0
1.3
4.0
mA
ISB1
Automatic CE
Power down
Current — CMOS Inputs
CE1 > VCC−0.2V, CE2 < 0.2V
VIN > VCC–0.2V, VIN < 0.2V)
f = fmax (Address and Data Only),
f = 0 (OE and WE), VCC = 3.60V
14
1
35
µA
ISB2[7]
Automatic CE
Power down
Current — CMOS Inputs
CE1 > VCC – 0.2V, CE2 < 0.2V
VIN > VCC – 0.2V or VIN < 0.2V,
f = 0, VCC = 3.60V
14
1
30
µA
Capacitance (For all packages)[8]
Parameter
Description
Test Conditions
Max
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VCC = VCC(typ)
10
pF
COUT
Output Capacitance
10
pF
Notes:
4. VIL(min) = –2.0V for pulse durations less than 20 ns.
5. VIH(max) = VCC+0.75V for pulse durations less than 20 ns.
6. Full device AC operation assumes a 100
µs ramp time from 0 to VCC(min) and 200 µs wait time after VCC stabilization.
7. Only chip enables (CE1 and CE2) must be at CMOS level to meet the ISB2 / ICCDR spec. Other inputs can be left floating.
8. Tested initially and after any design or process changes that may affect these parameters.
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