Universal Programmable Clock
Generator (UPCG)
CY22800
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 001-07704 Rev. *A
Revised May 11, 2007
Features
• Spread Spectrum, VCXO, and Frequency Select
• Input frequency range:
— Crystal: 8–30 MHz
— CLKIN: 0.5–100 MHz
• Output frequency:
— Commercial: 1–200 MHz
— Industrial: 1–166 MHz
• Integrated phase-locked loop
• Low jitter, high accuracy outputs
• 3.3V operation
• 8-pin SOIC package
Benefits
• Inventory of only one device, CY22800, is needed in various
applications such as HDTV, STB, DVDR, etc.
• Multiple predefined configurations that can be programmed
into a single chip
• Eliminates the need for expensive and difficult to use
higher-order crystal
• High-performance PLL tailored for multiple applications
• Meets critical timing requirements in complex system
designs
• Enables application compatibility
• Allows up to three different frequency selects
Logic Block Diagram
8-pin SOIC
1
2
3
4
XOUT
CLKB/FS1
VSS
CLKC/FS2/VSS
CLKA/FS0
5
6
7
8
VDD
XIN/CLKIN
FS0/VCXO
CY22800
Pin Configuration
XOUT
PLL
OSC
Q
P
VCO
VDD
VSS
Φ
CLKC
FS1
FS0
OUTPUT
DIVIDER
CLKB
(with modulation control)
XIN/CLKIN
CLKA
FS2
VCXO
Pin Description
Name
Pin Number
Description
XIN
1
Reference Input; Crystal or External Clock
VDD
2
3.3V Voltage Supply
FS0/VCXO
3
Frequency Select 0/VCXO Analog Control Voltage[1]
VSS
4
Ground
CLKB/FS1
5
Clock Output B/Frequency Select 1[1]
CLKA/FS0
6
Clock Output A/Frequency Select 0[1]
CLKC/FS2/VSS
7
Clock Output C/Frequency Select 2/VSS[1]
XOUT
8
Reference Output (No Connect when the reference is a clock)
Note
1. Pin definition changes for different configurations. Refer to the specific one-page data sheet for more details.
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