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CY22180FSXI Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY22180FSXI
Description  Very Low Jitter Field and Factory Programmable Clock Generator
Download  8 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY22180FSXI Datasheet(HTML) 3 Page - Cypress Semiconductor

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PRELIMINARY
CY22180
Document #: 001-15577 Rev. **
Page 3 of 8
Product Functions
Input Frequency (XIN, pin 1 and XOUT, pin 8)
The input to the CY22180 can be a crystal or a clock. The input
frequency range for crystals is 10 to 30 MHz, and for clock
signals is 10 to 133 MHz.
CXIN and CXOUT (pin 1 and pin 8)
The internal load capacitors at pin 1 (CXIN) and pin 8 (CXOUT)
can be programmed from 12 pF to 60 pF in 0.5-pF increments.
Thus, these programmable capacitors support crystals with CL
values between 6 pF and 30 pF. The crystal CL value, minus
board parasitic capacitance, is the value entered into Cyber-
Clocks Online Software.
If using a driven reference, CyberClocks Online Software will
set CXIN and CXOUT to the minimum value 12 pF.
Output Clock (CLKOUT, pin 6)
The output clock can be programmed to any frequency in the
range of 20–200 MHz.
Reference Output (REFOUT, pin 5)
The reference clock output has the same frequency as the
input clock. This output can be programmed to be enabled
(clock on) or disabled (High-Z, clock off) through CyberClocks
Online software. If this output is not needed, Cypress recom-
mends that users request the disabled (High-Z, Clock Off)
option.
Power Down or Output Enable (PD# or OE, pin 3)
The CY22180 can be programmed to include either PD# or OE
function. PD# function can be used to power down the oscil-
lator and PLL. The OE function disables the outputs but does
not turn off the PLL. PD# achieves lower power consumption,
but PLL start up time means that turn-on time is slower than
for OE.
Absolute Maximum Ratings
Supply Voltage (VDD) ........................................–0.5 to +7.0V
DC Input Voltage ...................................... –0.5V to VDD + 0.5
Storage Temperature (Non-condensing)..... –55
°C to +125°C
Junction Temperature ................................ –40
°C to +125°C
Data Retention @ Tj = 125
°C................................> 10 years
Package Power Dissipation...................................... 350 mW
Static Discharge Voltage.......................................... > 2000V
(per MIL-STD-883, Method 3015)
Recommended Crystal Specifications
Parameter
Description
Comments
Min.
Typ.
Max.
Unit
FNOM
Nominal Crystal Frequency
Parallel resonance, fundamental mode,
AT cut
10
30
MHz
CLNOM
Nominal Load Capacitance
6
30
pF
R1
Equivalent Series Resistance (ESR) Fundamental mode
25
Ω
DL
Crystal Drive Level
No external series resistor assumed
0.5
2
mW
Operating Conditions
Parameter
Description
Min.
Typ.
Max.
Unit
VDD
Supply Voltage
3.13
3.30
3.45
V
TA
Ambient Commercial Temperature
0
70
°C
Ambient Industrial Temperature
–40
85
°C
CLOAD
Max. Load Capacitance @ pin 5 and pin 6
10
pF
FXIN
External Reference Crystal
10
30
MHz
FCLKIN
External Reference Clock
10
133
MHz
FCLKOUT
CLKOUT frequency, Commercial Temperature
20
200
MHz
CLKOUT frequency, Industrial Temperature
20
166
MHz
FREFOUT
REFOUT frequency
10
133
MHz
TPU
Power-up time for all VDDs to reach minimum specified voltage (power ramp
must be monotonic)
0.05
500
ms


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