1-Mbit (128K x 8) nvSRAM
PRELIMINARY
CY14B101L
Cypress Semiconductor Corporation
•
198 Champion Court
•
San Jose
, CA 95134-1709
•
408-943-2600
Document #: 001-06400 Rev. *E
Revised January 24, 2007
Features
• 25 ns, 35 ns, and 45 ns access times
• “Hands-off” automatic STORE on power down with only a
small capacitor
• STORE to QuantumTrapTM nonvolatile elements is initiated
by software, device pin, or AutostoreTM on power down
• RECALL to SRAM initiated by software or power up
•Infinite READ, WRITE, and RECALL cycles
• 10 mA typical ICC at 200 ns cycle time
• 200,000 STORE cycles to quantum trap
• 20-year data retention @ 55
°C
• Single 3V operation +20%, –10%
• Commercial and industrial temperature
• SOIC and SSOP packages
• RoHS compliance
Functional Description
The Cypress CY14B101L is a fast static RAM with a
nonvolatile element in each memory cell. The embedded
nonvolatile elements incorporate QuantumTrap technology
producing, the world’s most reliable nonvolatile memory. The
SRAM provides infinite read and write cycles; while
independent, nonvolatile data resides in the highly reliable
QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile
memory. Both the STORE and RECALL operations are also
available under software control.
Logic Block Diagram
STORE/
RECALL
CONTROL
POWER
CONTROL
SOFTWARE
DETECT
STATIC RAM
ARRAY
1024 X 1024
QuantumTrap
1024 x 1024
STORE
RECALL
COLUMN IO
COLUMN DEC
OE
CE
WE
HSB
VCC
VCAP
A15
- A0
A0 A1 A2 A3 A4 A10 A11
A5
A6
A7
A8
A9
A12
A13
A14
A15
A16
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
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