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IDT7204L50TPGI Datasheet(PDF) 7 Page - Integrated Device Technology |
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IDT7204L50TPGI Datasheet(HTML) 7 Page - Integrated Device Technology |
7 / 14 page 7 COMMERCIAL,INDUSTRIALANDMILITARY TEMPERATURERANGES IDT7203/7204/7205/7206/7207/7208 CMOS ASYNCHRONOUS FIFO 2,048 x 9, 4,096 x 9, 8,192 x 9, 16,384 x 9, 32,768 x 9 and 65,536 x 9 APRIL 3, 2006 Figure 4. Full Flag Timing From Last Write to First Read NOTE: 1. W and R = VIH around the rising edge of RS. Figure 2. Reset Figure 3. Asynchronous Write and Read Operation W RS R EF HF, FF tRSC tRS tRSS tRSS tRSR tEFL tHFH, tFFH 2661 drw04 R W D0-D8 tRC tA tWR tDS DATA tDH tWPW tWC VALID tRHZ tDV tA tRR tRPW IN VALID DATA OUT VALID DATA OUT DATA IN VALID 2661 drw05 Q0-Q8 tRLZ R W FF tRFF tWFF FIRST READ IGNORED WRITE LAST WRITE 2661 drw06 |
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