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CY7C1460AV33
CY7C1462AV33
CY7C1464AV33
Document #: 38-05353 Rev. *D
Page 9 of 27
Write Cycle
(Begin Burst)
External
L
L
L
L
L
X
L
L-H
Data In (D)
Write Cycle
(Continue Burst)
Next
X
L
H
X
L
X
L
L-H
Data In (D)
NOP/WRITE ABORT
(Begin Burst)
None
L
L
L
L
H
X
L
L-H
Tri-State
WRITE ABORT
(Continue Burst)
Next
X
L
H
X
H
X
L
L-H
Tri-State
IGNORE CLOCK
EDGE
(Stall)
Current
X
L
X
X
X
X
H
L-H
-
SLEEP MODE
None
X
H
X
X
X
X
X
X
Tri-State
Truth Table[1, 2, 3, 4, 5, 6, 7] (continued)
Operation
Address
Used
CE
ZZ
ADV/LD
WE
BWx
OE
CEN
CLK
DQ
Partial Write Cycle Description[1, 2, 3, 8]
Function (CY7C1460AV33)
WE
BWd
BWc
BWb
BWa
Read
H
X
X
X
X
Write – No bytes written
L
H
H
H
H
Write Byte a – (DQa and DQPa)
L
HHH
L
Write Byte b – (DQb and DQPb)L
H
H
L
H
Write Bytes b, a
L
H
H
L
L
Write Byte c – (DQc and DQPc)L
H
L
H
H
Write Bytes c, a
L
H
L
H
L
Write Bytes c, b
L
H
LL
L
H
Write Bytes c, b, a
L
H
L
L
L
Write Byte d – (DQd and DQPd)L
L
H
H
H
Write Bytes d, a
L
L
H
H
L
Write Bytes d, b
L
LHLH
Write Bytes d, b, a
L
L
H
L
L
Write Bytes d, c
L
L
L
H
H
Write Bytes d, c, a
L
L
L
H
L
Write Bytes d, c, b
L
L
L
L
H
Write All Bytes
L
L
L
L
L
Function (CY7C1462AV33)[2,8]
WE
BWb
BWa
Read
Hx
x
Write – No Bytes Written
L
H
H
Write Byte a – (DQa and DQPa)L
H
L
Write Byte b – (DQb and DQPb)L
L
H
Write Both Bytes
L
L
L
Function (CY7C1464AV33)[2,8]
WE
BWx
Read
Hx
Write – No Bytes Written
L
H
Write Byte X
− (DQ
x and DQPx)
LL
Write All Bytes
LAll BW = L
Note:
8. Table only lists a partial listing of the byte write combinations. Any combination of BW[a:d] is valid. Appropriate write will be done based on which byte write is active.
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