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IDT82V2044E Datasheet(PDF) 1 Page - Integrated Device Technology |
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IDT82V2044E Datasheet(HTML) 1 Page - Integrated Device Technology |
1 / 73 page 1 2003 Integrated Device Technology, Inc. All rights reserved. DSC-6533/- QUAD CHANNEL T1/E1/J1 SHORT HAUL LINE INTERFACE UNIT IDT82V2044E FEATURES: • Four channel T1/E1/J1 short haul line interfaces • Supports HPS (Hitless Protection Switching) for 1+1 protection without external relays • Programmable T1/E1/J1 switchability allowing one bill of ma- terial for any line condition • Single 3.3 V power supply with 5 V tolerance on digital interfaces • Meets or exceeds specifications in - ANSI T1.102, T1.403 and T1.408 - ITU I.431, G.703,G.736, G.775 and G.823 - ETSI 300-166, 300-233 and TBR 12/13 - AT&T Pub 62411 • Per channel software selectable on: - Wave-shaping templates - Line terminating impedance (T1:100 Ω, J1:110 Ω, E1:75 Ω/120 Ω) - Adjustment of arbitrary pulse shape - JA (Jitter Attenuator) position (receive path or transmit path) - Single rail/dual rail system interfaces - B8ZS/HDB3/AMI line encoding/decoding - Active edge of transmit clock (TCLK) and receive clock (RCLK) - Active level of transmit data (TDATA) and receive data (RDATA) - Receiver or transmitter power down - High impedance setting for line drivers - PRBS (Pseudo Random Bit Sequence) generation and detection with 215-1 PRBS polynomials for E1 - QRSS (Quasi RandomSequenceSignals)generationand detection with 220-1 QRSS polynomials for T1/J1 - 16-bit BPV (Bipolar Pulse Violation)/Excess Zero/PRBS or QRSS error counter - Analog loopback, Digital loopback, Remote loopback and Inband loopback • Adaptive receive sensitivity up to -20 dB • Non-intrusive monitoring per ITU G.772 specification • Short circuit protection for line drivers • LOS (Loss Of Signal) detection with programmable LOS levels • AIS (Alarm Indication Signal) detection • JTAG interface • Supports serial control interface, Motorola and Intel Non-Multi- plexed interfaces • Package: IDT82V2044E: 128-pin TQFP DESCRIPTION: The IDT82V2044E can be configured as a quad T1, quad E1 or quad J1 Line Interface Unit. The IDT82V2044E performs clock/data recovery, AMI/B8ZS/HDB3 line decoding and detects and reports the LOS condi- tions. An integrated Adaptive Equalizer is available to increase the receive sensitivity and enable programming of LOS levels. In transmit path, there is an AMI/B8ZS/HDB3 encoder and Waveform Shaper. There is one Jitter Attenuator for each channel, which can be placed in either the receive path or the transmit path. The Jitter Attenuator can also be disabled. The IDT82V2044E supports both Single Rail and Dual Rail system interfaces and both serial and parallel control interfaces. To facilitate the network maintenance, a PRBS/QRSS generation/detection circuit is integrated in each channel, and different types of loopbacks can be set on a per channel basis. Four different kinds of line terminating impedance, 75 Ω, 100 Ω, 110 Ω and 120 Ω are selectable on a per channel basis. The chip also provides driver short-circuit protection and supports JTAG boundary scanning. The IDT82V2044E can be used in SDH/SONET, LAN, WAN, Routers, Wireless Base Stations, IADs, IMAs, IMAPs, Gateways, Frame Relay Access Devices, CSU/DSU equipment, etc. INDUSTRIAL TEMPERATURE RANGES August 2004 The IDT logo is a registered trademark of Integrated Device Technology, Inc. |
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