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CY7C1410AV18-250BZXC Datasheet(PDF) 10 Page - Cypress Semiconductor

Part # CY7C1410AV18-250BZXC
Description  36-Mbit QDR-II??SRAM 2-Word Burst Architecture
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1410AV18-250BZXC Datasheet(HTML) 10 Page - Cypress Semiconductor

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CY7C1410AV18
CY7C1425AV18
CY7C1412AV18
CY7C1414AV18
Document #: 38-05615 Rev. *D
Page 10 of 25
L
H
L-H
During the data portion of a write sequence
:
CY7C1410AV18
− only the lower nibble (D[3:0]) is written into the device. D[7:4]
remains unaltered,
CY7C1412AV18
− only the lower byte (D[8:0]) is written into the device. D[17:9]
remains unaltered.
H
L
L-H
During the data portion of a write sequence
:
CY7C1410AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0]
remains unaltered,
CY7C1412AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0]
remains unaltered.
H
L
L-H
During the data portion of a write sequence
:
CY7C1410AV18
− only the upper nibble (D[7:4]) is written into the device. D[3:0]
remains unaltered,
CY7C1412AV18
− only the upper byte (D[17:9]) is written into the device. D[8:0]
remains unaltered.
H
H
L-H
No data is written into the devices during this portion of a write operation.
H
H
L-H
No data is written into the devices during this portion of a write operation.
Write Cycle Descriptions (CY7C1414AV18) [2, 8]
BWS0 BWS1 BWS2 BWS3
KK
Comments
L
L
L
L
L-H
During the data portion of a write sequence, all four bytes (D[35:0]) are
written into the device.
L
L
L
L
L-H
During the data portion of a write sequence, all four bytes (D[35:0]) are
written into the device.
L
H
H
H
L-H
During the data portion of a write sequence, only the lower byte (D[8:0])
is written into the device. D[35:9] remains unaltered.
L
H
H
H
L-H
During the data portion of a write sequence, only the lower byte (D[8:0])
is written into the device. D[35:9] remains unaltered.
H
L
H
H
L-H
During the data portion of a write sequence, only the byte (D[17:9]) is
written into the device. D[8:0] and D[35:18] remains unaltered.
H
L
H
H
L-H
During the data portion of a write sequence, only the byte (D[17:9]) is
written into the device. D[8:0] and D[35:18] remains unaltered.
H
H
L
H
L-H
During the data portion of a write sequence, only the byte (D[26:18]) is
written into the device. D[17:0] and D[35:27] remains unaltered.
H
H
L
H
L-H
During the data portion of a write sequence, only the byte (D[26:18]) is
written into the device. D[17:0] and D[35:27] remains unaltered.
H
H
H
L
L-H
During the data portion of a write sequence, only the byte (D[35:27]) is
written into the device. D[26:0] remains unaltered.
H
H
H
L
L-H
During the data portion of a write sequence, only the byte (D[35:27]) is
written into the device. D[26:0] remains unaltered.
H
H
H
H
L-H
No data is written into the device during this portion of a write operation.
H
H
H
H
L-H
No data is written into the device during this portion of a write operation.
Write Cycle Descriptions (CY7C1425AV18)
BWS0
KK
Comments
L
L-H
During the data portion of a write sequence
:
CY7C1425AV18 - the single byte (D[8:0]) is written into the device
L
L-H
During the data portion of a write sequence
:
CY7C1425AV18 - the single byte (D[8:0]) is written into the device
H
L-H
No data is written into the devices during this portion of a Write operation.
H
L-H
No data is written into the devices during this portion of a Write operation.
Write Cycle Descriptions (CY7C1410AV18 and CY7C1412AV18) (continued)[2, 8]
BWS0/NWS0 BWS1/NWS1
KK
Comments


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