CY7C1368C
Document #: 38-05686 Rev. *F
Page 9 of 18
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature .................................... –65°C to +150°
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on VDD Relative to GND........ –0.5V to +4.6V
Supply Voltage on VDDQ Relative to GND ...... –0.5V to +VDD
DC Voltage Applied to Outputs
in Tri-State ........................................... –0.5V to VDDQ +0.5V
DC Input Voltage ..................................... –0.5V to VDD+0.5V
Current into Outputs (LOW)......................................... 20 mA
Static Discharge Voltage............................................ >2001V
(per MIL-STD-883,Method 3015)
Latch-up Current...................................................... >200 mA
Operating Range
Range
Ambient
Temperature
VDD
VDDQ
Commercial
0°C to +70°C
3.3V –
5%/+10%
2.5V – 5%
to VDD
Industrial
–40°C to +85°C
Electrical Characteristics Over the Operating Range[8, 9]
Parameter
Description
Test Conditions
Min.
Max.
Unit
VDD
Power Supply Voltage
3.135
3.6
V
VDDQ
I/O Supply Voltage
for 3.3V I/O
3.135
VDD
V
for 2.5V I/O
2.375
2.625
V
VOH
Output HIGH Voltage
for 3.3V I/O, IOH = –4.0 mA
2.4
V
for 2.5V I/O, IOH = –1.0 mA
2.0
V
VOL
Output LOW Voltage
for 3.3V I/O, IOL = 8.0 mA
0.4
V
for 2.5V I/O, IOL = 1.0 mA
0.4
V
VIH
Input HIGH Voltage[8]
for 3.3V I/O
2.0
VDD + 0.3V V
for 2.5V I/O
1.7
VDD + 0.3V V
VIL
Input LOW Voltage[8]
for 3.3V I/O
–0.3
0.8
V
for 2.5V I/O
–0.3
0.7
V
IX
Input Leakage Current
except ZZ and MODE
GND
≤ V
I ≤ VDDQ
–5
5
µA
Input Current of MODE
Input = VSS
–30
µA
Input = VDD
5
µA
Input Current of ZZ
Input = VSS
–5
µA
Input = VDD
30
µA
IOZ
Output Leakage Current
GND
≤ V
I ≤ VDDQ, Output Disabled
–5
5
µA
IDD
VDD Operating Supply Current VDD = Max., IOUT = 0 mA,
f = fMAX = 1/tCYC
4-ns cycle, 250 MHz
250
mA
5-ns cycle, 200 MHz
220
mA
6-ns cycle,166 MHz
180
mA
ISB1
Automatic CE
Power-down
Current—TTL Inputs
VDD = Max., Device Deselected,
VIN ≥ VIH or VIN ≤ VIL,
f = fMAX = 1/tCYC
4-ns cycle, 250 MHz
130
mA
5-ns cycle, 200 MHz
120
6-ns cycle,166 MHz
110
ISB2
Automatic CE
Power-down
Current—CMOS Inputs
VDD = Max., Device Deselected,
VIN ≤ 0.3V or VIN > VDDQ – 0.3V,
f = 0
All speeds
40
mA
ISB3
Automatic CE
Power-down
Current—CMOS Inputs
VDD = Max., Device Deselected,
or VIN ≤ 0.3V or
VIN > VDDQ – 0.3V,
f = fMAX = 1/tCYC
4-ns cycle, 250 MHz
120
mA
5-ns cycle, 200 MHz
110
6-ns cycle,166 MHz
100
ISB4
Automatic CE Power-down
Current—TTL Inputs
VDD = Max., Device Deselected,
VIN ≥ VIH or VIN ≤ VIL, f = 0
All speeds
40
mA
Notes:
8. Overshoot: VIH(AC) < VDD+1.5V(Pulse width less than tCYC/2), undershoot: VIL(AC)> –2V(Pulse width less than tCYC/2).
9. Power-up: Assumes a linear ramp from 0V to VDD(min.) within 200 ms. During this time VIH < VDD and VDDQ < VDD.
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