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Rev.01
16Mb SDRAM
8/18
A2 A1 A0
Interleave Addressing
Burst Length
X X 0
0 1
2
X X 1
1 0
X 0 0
0 1 2 3
4
X 0 1
1 0 3 2
X 1 0
2 3 0 1
X 1 1
3 2 1 0
0 0 0
0 1 2 3 4 5 6 7
8
0 0 1
1 0 3 2 5 4 7 6
Burst Type ( A3 )
Sequential Addressing
0 1
1 0
0 1 2 3
1 2 3 0
2 3 0 1
3 0 1 2
0 1 2 3 4 5 6 7
1 2 3 4 5 6 7 0
0 1 0
2 3 0 1 6 7 4 5
0 1 1
3 2 1 0 7 6 5 4
1 0 0
4 5 6 7 0 1 2 3
1 0 1
5 4 7 6 1 0 3 2
1 1 0
6 7 4 5 2 3 0 1
1 1 1
7 6 5 4 3 2 1 0
n n n
-
2 3 4 5 6 7 0 1
3 4 5 6 7 0 1 2
4 5 6 7 0 1 2 3
5 6 7 0 1 2 3 4
6 7 0 1 2 3 4 5
7 0 1 2 3 4 5 6
Cn Cn+1 Cn+2 …...
Full Page *
* Page length is a function of I/O organization and column addressing
x16 (CA0 ~ CA7) : Full page = 256 bits
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