Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

CY7C1910CV18-250BZI Datasheet(PDF) 9 Page - Cypress Semiconductor

Part # CY7C1910CV18-250BZI
Description  18-Mbit QDR-II??SRAM 2-Word Burst Architecture
Download  26 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1910CV18-250BZI Datasheet(HTML) 9 Page - Cypress Semiconductor

Back Button CY7C1910CV18-250BZI Datasheet HTML 5Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 6Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 7Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 8Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 9Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 10Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 11Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 12Page - Cypress Semiconductor CY7C1910CV18-250BZI Datasheet HTML 13Page - Cypress Semiconductor Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 26 page
background image
PRELIMINARY
CY7C1310CV18
CY7C1910CV18
CY7C1312CV18
CY7C1314CV18
Document #: 001-07164 Rev. *B
Page 9 of 26
DLL
These chips utilize a Delay Lock Loop (DLL) that is designed
to function between 80 MHz and the specified maximum clock
frequency. During power-up, when the DOFF is tied HIGH, the
DLL gets locked after 1024 cycles of stable clock. The DLL can
also be reset by slowing or stopping the input clock K and K
for a minimum of 30 ns. However, it is not necessary for the
DLL to be specifically reset in order to lock the DLL to the
desired frequency. The DLL will automatically lock 1024 clock
cycles after a stable clock is presented. The DLL may be
disabled by applying ground to the DOFF pin. When the DLL
is turned off, the device will behave in QDR-I mode (with one
cycle latency and a longer access time). For information refer
to the application note “DLL Considerations in QDRII/DDRII”.
Application Example[1]
Truth Table[2, 3, 4, 5, 6, 7]
Operation
K
RPS
WPS
DQ
DQ
Write Cycle:
Load address on the rising edge of K clock;
input write data on K and K rising edges.
L-H
X
L
D(A + 0) at K(t)
D(A + 1) at K(t)
Read Cycle:
Load address on the rising edge of K clock;
wait one and a half cycle; read data on C
and C rising edges.
L-H
L
X
Q(A + 0) at C(t + 1)
Q(A + 1) at C(t + 2)
NOP: No Operation
L-H
H
H
D = X
Q = High-Z
D = X
Q = High-Z
Standby: Clock Stopped
Stopped
X
X
Previous State
Previous State
Notes:
1. The above application shows four QDR-II being used.
2. X = “Don't Care,” H = Logic HIGH, L= Logic LOW,
represents rising edge.
3. Device will power-up deselected and the outputs in a tri-state condition.
4. “A” represents address location latched by the devices when transaction was initiated. A + 0, A + 1 represents the internal address sequence in the burst.
5. “t” represents the cycle at which a Read/Write operation is started. t + 1 and t + 2 are the first and second clock cycles respectively succeeding the “t” clock cycle.
6. Data inputs are registered at K and K rising edges. Data outputs are delivered on C and C rising edges, except when in single clock mode.
7. It is recommended that K = K and C = C = HIGH when clock is stopped. This is not essential, but permits most rapid restart by overcoming transmission line
charging symmetrically.
Vt = Vddq/2
CC#
D
A
K
CC#
D
A
K
BUS
MASTER
(CPU
or
ASIC)
SRAM #1
SRAM #4
DATA IN
DATA OUT
Address
RPS#
WPS#
BWS#
Source K
Source K#
Delayed K
Delayed K#
R = 50
οηµσ
R = 250
οηµσ
R = 250
οηµσ
R
P
S
#
W
P
S
#
B
W
S
#
R
P
S
#
W
P
S
#
B
W
S
#
Vt
Vt
Vt
R
R
R
ZQ
CQ/CQ#
Q
K#
ZQ
CQ/CQ#
Q
K#
CLKIN/CLKIN#
[+] Feedback
[+] Feedback


Similar Part No. - CY7C1910CV18-250BZI

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7C1910BV18 CYPRESS-CY7C1910BV18 Datasheet
262Kb / 25P
   18-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1910BV18 CYPRESS-CY7C1910BV18 Datasheet
1Mb / 28P
   18-Mbit QDR??II SRAM 2 Word Burst Architecture
CY7C1910BV18-167BZC CYPRESS-CY7C1910BV18-167BZC Datasheet
262Kb / 25P
   18-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1910BV18-167BZC CYPRESS-CY7C1910BV18-167BZC Datasheet
1Mb / 28P
   18-Mbit QDR??II SRAM 2 Word Burst Architecture
CY7C1910BV18-167BZI CYPRESS-CY7C1910BV18-167BZI Datasheet
1Mb / 28P
   18-Mbit QDR??II SRAM 2 Word Burst Architecture
More results

Similar Description - CY7C1910CV18-250BZI

ManufacturerPart #DatasheetDescription
logo
Cypress Semiconductor
CY7C1310BV18 CYPRESS-CY7C1310BV18_07 Datasheet
1Mb / 28P
   18-Mbit QDR??II SRAM 2 Word Burst Architecture
CY7C1310BV18 CYPRESS-CY7C1310BV18 Datasheet
262Kb / 25P
   18-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1310JV18 CYPRESS-CY7C1310JV18 Datasheet
639Kb / 26P
   18 Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1311BV18 CYPRESS-CY7C1311BV18 Datasheet
259Kb / 23P
   18-Mbit QDR-II SRAM 4-Word Burst Architecture
CY7C1311BV18 CYPRESS-CY7C1311BV18_06 Datasheet
505Kb / 28P
   18-Mbit QDR??II SRAM 4-Word Burst Architecture
CY7C1311CV18 CYPRESS-CY7C1311CV18 Datasheet
695Kb / 31P
   18-Mbit QDR??II SRAM 4-Word Burst Architecture
CY7C1311BV18 CYPRESS-CY7C1311BV18_11 Datasheet
1Mb / 32P
   18-Mbit QDR??II SRAM 4-Word Burst Architecture
CY7C1311JV18 CYPRESS-CY7C1311JV18 Datasheet
689Kb / 27P
   18-Mbit QDR II SRAM 4-Word Burst Architecture
CY7C1510KV18 CYPRESS-CY7C1510KV18_09 Datasheet
836Kb / 30P
   72-Mbit QDR-II SRAM 2-Word Burst Architecture
CY7C1410AV18 CYPRESS-CY7C1410AV18 Datasheet
277Kb / 23P
   36-Mbit QDR-II??SRAM 2-Word Burst Architecture
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com