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CY7C1245V18-300BZXI Datasheet(PDF) 3 Page - Cypress Semiconductor

Part # CY7C1245V18-300BZXI
Description  36-Mbit QDR??II SRAM 4-Word Burst Architecture (2.0 Cycle Read Latency)
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY7C1245V18-300BZXI Datasheet(HTML) 3 Page - Cypress Semiconductor

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CY7C1241V18
CY7C1256V18
CY7C1243V18
CY7C1245V18
Document Number: 001-06365 Rev. *C
Page 3 of 28
Logic Block Diagram (CY7C1243V18)
Logic Block Diagram (CY7C1245V18)
CLK
A(18:0)
Gen.
K
K
Control
Logic
Address
Register
D[17:0]
Read Data Reg.
RPS
WPS
Q[17:0]
Control
Logic
Address
Register
Reg.
Reg.
Reg.
36
19
18
72
18
BWS[1:0]
VREF
Write
Reg
36
A(18:0)
19
Write
Reg
Write
Reg
Write
Reg
18
CQ
CQ
DOFF
QVLD
CLK
A(17:0)
Gen.
K
K
Control
Logic
Address
Register
D[35:0]
Read Data Reg.
RPS
WPS
Q[35:0]
Control
Logic
Address
Register
Reg.
Reg.
Reg.
72
18
36
144
36
BWS[3:0]
VREF
Write
Reg
72
A(17:0)
18
Write
Reg
Write
Reg
Write
Reg
36
CQ
CQ
DOFF
QVLD
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