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P4C167-10CI Datasheet(PDF) 4 Page - Pyramid Semiconductor Corporation |
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P4C167-10CI Datasheet(HTML) 4 Page - Pyramid Semiconductor Corporation |
4 / 10 page P4C167 Page 4 of 10 Document # SRAM106 REV A Notes: 5. CE is LOW and WE is HIGH for READ cycle. 6. WE is HIGH, and address must be valid prior to or coincident with CE transition LOW. 7. Transition is measured ±200mV from steady state voltage prior to change with specified loading in Figure 1. This parameter is sampled and not 100% tested. 8. Read Cycle Time is measured from the last valid address to the first transitioning address. TIMING WAVEFORM OF READ CYCLE NO. 2(6) TIMING WAVEFORM OF READ CYCLE NO. 1(5) Symbol t RC t AA t AC t OH t LZ t HZ t PU t PD Parameter Read Cycle Time Address Access Time Chip Enable Access Time Output Hold from Address Change Chip Enable to Output in Low Z Chip Disable to Output in High Z Chip Enable to Power Up Time Chip Disable to Power Down Time Min Min Min Min Min Min Min Max Max Max Max Max Max Max –10 –12 –15 –20 –25 –35 –45 Unit 10 2 2 0 10 10 5 10 12 2 2 0 12 12 6 12 15 2 2 0 15 15 8 15 20 2 2 0 20 20 10 20 25 2 2 0 25 25 12 25 35 2 2 0 35 35 17 35 45 2 2 0 45 45 20 45 ns ns ns ns ns ns ns ns AC CHARACTERISTICS—READ CYCLE (V CC = 5V ± 10%, All Temperature Ranges) (2) |
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