Part Name
         Description
CY7C1021D

 1-Mbit (64K x 16) Static RAM ( 11 Page)


CYPRESS
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CY7C1021D
Document #: 38-05462 Rev. *E
Page 6 of 11
Data Retention Characteristics (Over the Operating Range)
Parameter
Description
Conditions
Min
Max
Unit
VDR
VCC for Data Retention
2.0
V
ICCDR
Data Retention Current
VCC = VDR = 2.0 V, CE > VCC – 0.3 V,
VIN > VCC – 0.3 V or VIN < 0.3 V
Industrial
3
mA
Automotive
15
mA
tCDR [4]
Chip Deselect to Data Retention Time
0
ns
tR [13]
Operation Recovery Time
tRC
ns
Data Retention Waveform
Switching Waveforms
Read Cycle No. 1 (Address Transition Controlled) [14, 15]
Read Cycle No. 2 (OE Controlled) [15, 16]
4.5V
4.5V
tCDR
VDR > 2V
DATA RETENTION MODE
tR
CE
VCC
PREVIOUS DATA VALID
DATA VALID
RC
tAA
tOHA
tRC
ADDRESS
DATA OUT
50%
50%
DATA VALID
tRC
tACE
tDOE
tLZOE
tLZCE
tPU
HIGH IMPEDANCE
tHZOE
tHZBE
tPD
tDBE
tLZBE
tHZCE
HIGH
IMPEDANCE
ICC
ISB
OE
CE
ADDRESS
DATA OUT
VCC
SUPPLY
BHE,BLE
CURRENT
Notes
13. Full device operation requires linear VCC ramp from VDR to VCC(min) > 50 µs or stable at VCC(min) > 50 µs.
14. Device is continuously selected. OE, CE, BHE and/or BLE = VIL.
15. WE is HIGH for read cycle.
16. Address valid prior to or coincident with CE transition LOW.



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