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IDT82P2808BBG Datasheet(PDF) 5 Page - Integrated Device Technology

Part # IDT82P2808BBG
Description  8(1) Channel High-Density T1/E1/J1 Line Interface Unit
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT82P2808BBG Datasheet(HTML) 5 Page - Integrated Device Technology

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IDT82P2808
8(+1) CHANNEL HIGH-DENSITY T1/E1/J1 LINE INTERFACE UNIT
Table of Contents
5
January 11, 2007
4.1.4
Per-Channel Software Reset ...................................................................................................................... 65
4.2 MICROPROCESSOR INTERFACE ......................................................................................................................... 65
4.3 POWER UP .............................................................................................................................................................. 66
4.4 HITLESS PROTECTION SWITCHING (HPS) SUMMARY ...................................................................................... 66
5 PROGRAMMING INFORMATION ................................................................................................................................... 69
5.1 REGISTER MAP ...................................................................................................................................................... 69
5.1.1
Global Register ........................................................................................................................................... 69
5.1.2
Per-Channel Register ................................................................................................................................. 70
5.2 REGISTER DESCRIPTION ..................................................................................................................................... 73
5.2.1
Global Register ........................................................................................................................................... 73
5.2.2
Per-Channel Register ................................................................................................................................. 81
6 JTAG ............................................................................................................................................................................. 111
6.1 JTAG INSTRUCTION REGISTER (IR) .................................................................................................................. 111
6.2 JTAG DATA REGISTER ........................................................................................................................................ 111
6.2.1
Device Identification Register (IDR) .......................................................................................................... 111
6.2.2
Bypass Register (BYP) ............................................................................................................................. 111
6.2.3
Boundary Scan Register (BSR) ................................................................................................................ 111
6.3 TEST ACCESS PORT (TAP) CONTROLLER ....................................................................................................... 111
7 THERMAL MANAGEMENT .......................................................................................................................................... 113
7.1 JUNCTION TEMPERATURE ................................................................................................................................. 113
7.2 JUNCTION TEMPERATURE CALCULATION IN WORST CASE ......................................................................... 113
8 PHYSICAL AND ELECTRICAL SPECIFICATIONS ..................................................................................................... 114
8.1 ABSOLUTE MAXIMUM RATINGS ......................................................................................................................... 114
8.2 RECOMMENDED OPERATING CONDITIONS .................................................................................................... 115
8.3 DEVICE POWER CONSUMPTION AND DISSIPATION (TYPICAL) 1 ................................................................. 116
8.4 DEVICE POWER CONSUMPTION AND DISSIPATION (MAXIMUM) 1 ............................................................... 117
8.5 D.C. CHARACTERISTICS ..................................................................................................................................... 118
8.6 E1 RECEIVER ELECTRICAL CHARACTERISTICS ............................................................................................. 119
8.7 T1/J1 RECEIVER ELECTRICAL CHARACTERISTICS ......................................................................................... 120
8.8 E1 TRANSMITTER ELECTRICAL CHARACTERISTICS ...................................................................................... 121
8.9 T1/J1 TRANSMITTER ELECTRICAL CHARACTERISTICS ................................................................................. 122
8.10 TRANSMITTER AND RECEIVER TIMING CHARACTERISTICS ......................................................................... 123
8.11 CLKE1 TIMING CHARACTERISTICS ................................................................................................................... 125
8.12 JITTER ATTENUATION CHARACTERISTICS ...................................................................................................... 126
8.13 MICROPROCESSOR INTERFACE TIMING ......................................................................................................... 129
8.13.1 Serial Microprocessor Interface ................................................................................................................ 129
8.13.2 Parallel Motorola Non-Multiplexed Microprocessor Interface ................................................................... 131
8.13.2.1 Read Cycle Specification .......................................................................................................... 131
8.13.2.2 Write Cycle Specification .......................................................................................................... 132
8.13.3 Parallel Intel Non-Multiplexed Microprocessor Interface ........................................................................... 133
8.13.3.1 Read Cycle Specification .......................................................................................................... 133
8.13.3.2 Write Cycle Specification .......................................................................................................... 134
8.13.4 Parallel Motorola Multiplexed Microprocessor Interface ........................................................................... 135


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