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P4C164-45CCLF Datasheet(PDF) 6 Page - Pyramid Semiconductor Corporation |
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P4C164-45CCLF Datasheet(HTML) 6 Page - Pyramid Semiconductor Corporation |
6 / 16 page P4C164 Page 6 of 16 Document # SRAM115 REV F Notes: 11. CE 1 and WE must be LOW, and CE2 HIGH for WRITE cycle. 12. OE is LOW for this WRITE cycle to show t WZ and tOW. 13. If CE 1 goes HIGH, or CE2 goes LOW, simultaneously with WE HIGH, the output remains in a high impedance state. TIMING WAVEFORM OF WRITE CYCLE NO. 2 ( CE CE CE CE CE CONTROLLED)(11) 14. Write Cycle Time is measured from the last valid address to the first transitioning address. TIMING WAVEFORM OF WRITE CYCLE NO. 1 ( WE WE WE WE WE CONTROLLED)(11) |
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