 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TNETE2101APZ Datasheet(PDF) 3 Page - Texas Instruments |
|
||||||||||||||||||||||||||||||
TNETE2101APZ Datasheet(HTML) 3 Page - Texas Instruments |
|
|
3 / 39 page  TNETE2101 10BASE-T/100BASE-TX/100BASE-FX LOW-POWER PHYSICAL-LAYER INTERFACE SPWS032D – JANUARY 1997 – REVISED MARCH 1999 3 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 Terminal Functions analog function TERMINAL TYPE† I/O DESCRIPTION NAME NO. TYPE† I/O DESCRIPTION ACAGC 3 A I Automatic gain control (AGC) capacitor for the AGC loop ACBLW 2 A I Baseline wander (BLW) capacitor for the BLW correction loop ACPLL 1 A I PLL capacitor required for an internal PLL AIREF 6 A I Analog current reference. An external resistor between AIREF and analog ground sets the bias current for internal analog circuits. ATXREF 8 A I 100BASE-TX transmit reference. An external resistor between ATXREF and analog ground sets the 100BASE-TX transmit amplitude. † A = analog configuration TERMINAL TYPE I/O DESCRIPTION NAME NO. TYPE I/O DESCRIPTION CAUTONEG 33 TTL I Autonegotiation enable. CAUTONEG enables (active high) or disables autonegotiation within the PHY. When CAUTONEG is low, the current values of CSPEED and CDUPLEX determine the speed and duplex of the PHY. On the rising edge of CAUTONEG, the values of CSPEED and CDUPLEX set the advertised capabilities of the PHY for autonegotiate. This also occurs on power up or on the rising edge of MRST if CAUTONEG is high. When CAUTONEG is high, the autonegotiation process also can be controlled with the PHY register bit AUTOENB (register 0, bit 12). See 10BASE-T/100BASE-TX PHY operation for details. CDEVSEL2 CDEVSEL1 CDEVSEL0 20 19 18 TTL I MII device-select address. The values of CDEVSEL2–CDEVSEL0, SLINK (CDEVSEL3), and MCOL (CDEVSEL4) are latched into the MII on the rising edge of MRST. This allows a unique address to be assigned to the PHY in applications in which multiple PHYs are in use. CDUPLEX 36 TTL I/O Duplex configuration. When CAUTONEG is low, CDUPLEX sets the PHY duplex to either half-duplex (low) or full-duplex (high). When CAUTONEG is high and autonegotiation is complete, CDUPLEX is driven low if half-duplex mode was selected, or set to the high-impedance state if full-duplex mode was selected. The PHY duplex also can be controlled and read at PHY register 0, bit 8, DUPLEX. CFIBER 22 TTL I 100BASE-FX fiber-mode enable. In 100BASE-FX fiber mode, the fiber interface is enabled, and unshielded twisted pair (UTP) interface and autonegotiation are disabled. Selecting 10BASE-T mode with this mode enabled causes the PHY to power down. This function can be controlled by PHY register 0x11 bit 10, FIBER, if CFIBER is high. CISOLATE 38 TTL I MII-isolate enable. CISOLATE causes the PHY to raise all its MII outputs to a high-impedance state and ignore the MII inputs. In normal mode (CREPEATER is high), the PHY raises MTCLK, MRCLK, MRXD0–MRXD3, MRXDV, MRXER, MCRS, and MCOL to a high-impedance state and does not respond to MTXEN. In repeater mode, only MRCLK, MRXD0–MRXD3, MRXDV, and MRXER are raised to high impedance and, consequently, CISOLATE performs an active-high receive-enable function. This function can be controlled by PHY register 0, bit 10, ISOLATE, if CISOLATE is low. CLOOPBK 30 TTL I Loopback enable. When CLOOPBK is low, transmit is looped back to receive. This function can be controlled by PHY register 0, bit 14, LOOPBK, if CLOOPBK is high. CPASS5B 37 TTL I Pass-through mode enable. CPASS5B when set low, configures the PHY to bypass the internal 5B4B encoder and decoder. The 5B-encoded data is transmitted on MTXD0–MTXD3 and MTXER with the most significant data bit on MTXER. The 5B-encoded data is received on MRXD0–MRXD3 and MRXER, with the most significant bit on MRXER. This function can be controlled by PHY register 0x11, bit 8, NOENDEC, if CPASS5B is high. |
Similar Part No. - TNETE2101APZ |
|
Similar Description - TNETE2101APZ |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
