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IDT5T93GL04PGGI Datasheet(PDF) 9 Page - Integrated Device Technology |
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IDT5T93GL04PGGI Datasheet(HTML) 9 Page - Integrated Device Technology |
9 / 17 page IDT5T93GL04 2.5V LVDS 1:4 GLITCHLESS CLOCK BUFFER TERABUFFER™ II IDT™ LVDS GLITCHLESS CLOCK BUFFER TERABUFFER™ II 9 IDT5T93GL04 REV. A JULY 10, 2007 Differential AC Timing Waveforms Output Propagation and Skew Waveforms NOTE 1: Pulse skew is calculated using the following expression: tsk(p) = |tp HL – tpLH| Note that the tpHL and tpLH shown above ae not valid measurements for this calculation because they are not taken from the same pulse. NOTE 2: AC propagation measurements should not be taken within the first 100 cycles of startup. Differential Gate Disabled/Endable Showing Runt Pulse Generation NOTE 1: As shown, it is possible to generate runt pulses on gate disable and enable of the outputs. It is the user’s responsibility to time the G signal to avoid this problem. tPLH tPHL tSK(O) tSK(O) Qn - Qn Qm - Qm +VDIF VDIF =0 -VDIF +VDIF VDIF =0 -VDIF A[1:2] -A[1:2] +VDIF VDIF =0 -VDIF 1/fo tPLH GL G Qn - Qn tPGD tPGE VIH VTHI VIL VIH VTHI VIL +VDIF VDIF =0 -VDIF A[1:2] -A[1:2] +VDIF VDIF =0 -VDIF |
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