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MK1581-01GILFTR Datasheet(PDF) 5 Page - Integrated Device Technology

Part # MK1581-01GILFTR
Description  LOW PHASE NOISE T1/E1 CLOCK GENERATOR
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

MK1581-01GILFTR Datasheet(HTML) 5 Page - Integrated Device Technology

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MK1581-01
LOW PHASE NOISE T1/E1 CLOCK GENERATOR
VCXO AND SYNTHESIZER
IDT™ / ICS™ LOW PHASE NOISE T1/E1 CLOCK GENERATOR
5
MK1581-01
REV D 073007
A “normalized” PLL loop bandwidth may be calculated as
follows:
The “normalized” bandwidth (NBW) equation above does
not take into account the effects of damping factor or the
second pole. NBW is approximately equal to the actual -3dB
bandwidth of the loop when the damping factor is about 5
and C2 is very small. In most applications, NBW is about
75% of the actual -3dB bandwidth. However, NBW does
provide a useful approximation of filter performance.
The loop damping factor is calculated as follows:
Where:
RS = Value of resistor in loop filter (Ohms)
ICP = Charge pump current (amps)
(refer to Charge Pump Current Table, below)
N = Crystal multiplier shown in the above table
CS = Value of capacitor CS in loop filter (Farads)
As a general rule, the following relationship should be
maintained between components CS and CP in the loop
filter:
Charge Pump Current Table
Special considerations must be made in choosing loop
components CS and CP.
These recommendations can be found in the design aid
tools section of www.icst.com.
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
Ω trace (a commonly
used trace impedance), place a 33
Ω resistor in series with
the clock line, as close to the clock output pin as possible.
The nominal impedance of the clock output is 20
Ω. (The
optional series termination resistor is not shown in the
External Component Schematic.)
Decoupling Capacitors
As with any high performance mixed-signal IC, the
MK1581-01 must be isolated from system power supply
noise to perform optimally.
Decoupling capacitors of 0.01µF must be connected
between each VDD and the PCB ground plane. To further
guard against interfering system supply noise, the
MK1581-01 should use one common connection to the PCB
power plane as shown in the diagram on the next page. The
ferrite bead and bulk capacitor help reduce lower frequency
noise in the supply that can lead to output clock phase
modulation.
NBW
RS ICP
×
575
×
N
-----------------------------------------
=
Damping Factor
RS
625
I
CP
×
CS
×
N
-------------------------------------------
×
=
CP
CS
20
------
=
RSET
Charge Pump Current
(ICP)
1.4 M
10
µA
680 k
20
µA
540 k
25
µA
120 k
100
µA


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