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PXAS33KFBE Datasheet(PDF) 8 Page - NXP Semiconductors |
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PXAS33KFBE Datasheet(HTML) 8 Page - NXP Semiconductors |
8 / 52 page Philips Semiconductors Preliminary specification XA-S3 XA 16-bit microcontroller 32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V), I2C, 2 UARTs, 16 MB address range 2000 Dec 01 8 MNEMONIC NAME AND FUNCTION TYPE PIN NUMBER MNEMONIC NAME AND FUNCTION TYPE LQFP PLCC P1.0 – P1.7 35–42 32–39 I/O Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type. Port 1 latches have 1s written to them and are configured in the quasi-bidirectional mode during reset. The operation of port 1 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to the section on I/O port configuration and the DC Electrical Characteristics for details. Port 1 also provides various special functions as described below: 35 32 O A0/WRH (P1.0) Address bit 0 of the external address bus when the eternal data bus is configured for an 8-bit width. When the external data bus is configured for a 16-bit width, this pin becomes the high byte write strobe. 36 33 O A1 (P1.1): Address bit 1 of the external address bus. 37 34 O A2 (P1.2): Address bit 2 of the external address bus. 38 35 O A3 (P1.3): Address bit 3 of the external address bus. 39 36 I RxD1 (P1.4): Serial port 1 receiver input. 40 37 O TxD1 (P1.5): Serial port 1 transmitter output. 41 38 I/O T2 (P1.6): Timer/counter 2 external count input or overflow output. 42 39 O T2EX (P1.7): Timer/counter 2 reload/capture/direction control. P2.0 – P2.7 59–66 58, 59, 61–66 I/O Port 2: Port 2 is an 8-bit I/O port with a user-configurable output type. Port 2 latches have 1s written to them and are configured in the quasi-bidirectional mode during reset. The operation of port 2 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to the section on I/O port configuration and the DC Electrical Characteristics for details. When the external program/data bus is used in 16-bit mode, Port 2 becomes the multiplexed high data/instruction byte and address lines 12 through 19. When the external data/address bus is used in 8-bit mode, the number of address lines that appear on Port 2 is user programmable in groups of 4 bits. P3.0 – P3.7 11–18 3–10 I/O Port 3: Port 3 is an 8-bit I/O port with a user-configurable output type. Port 3 latches have 1s written to them and are configured in the quasi-bidirectional mode during reset. The operation of port 3 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to the section on I/O port configuration and the DC Electrical Characteristics for details. Port 3 also provides the various special functions as described below: 11 3 I RxD0 (P3.0): Receiver input for serial port 0. 12 4 O TxD0 (P3.1): Transmitter output for serial port 0. 13 5 I INT0 (P3.2): External interrupt 0 input. 14 6 I INT1 (P3.3): External interrupt 1 input. 15 7 I/O T0 (P3.4): Timer/counter 0 external count input or overflow output. 16 8 I/O T1 / BUSW (P3.5): Timer/counter 1 external count input or overflow output. The value on this pin is latched as an external chip reset is completed and defines the default external data bus width. 17 9 O WRL (P3.6): External data memory low byte write strobe. 18 10 O RD (P3.7): External data memory read strobe. P4.0 – P4.7 3–10 73–79, 2 I/O Port 4: Port 4 is an 8-bit I/O port with a user-configurable output type. Port 4 latches have 1s written to them and are configured in the quasi-bidirectional mode during reset. The operation of Port 4 pins as inputs and outputs depends upon the port configuration selected. Each port pin is configured independently. Refer to the section on I/O port configuration and the DC Electrical Characteristics for details. Port 4 also provides various special functions as described below: 3 73 I ECI (P4.0): PCA External clock input. 4 74 I/O CEX0 (P4.1): Capture/compare external I/O for PCA module 0. 5 75 I/O CEX1 (P4.2): Capture/compare external I/O for PCA module 1. 6 76 I/O CEX2 (P4.3): Capture/compare external I/O for PCA module 2. 7 77 I/O CEX3 (P4.4): Capture/compare external I/O for PCA module 3. 8 78 I/O CEX4 (P4.5): Capture/compare external I/O for PCA module 4. 9 79 O A20 (P4.6): Address bit 20 of the external address bus. 10 2 O A21 (P4.7): Address bit 21 of the external address bus. |
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