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MAX550BC Datasheet(PDF) 3 Page - Maxim Integrated Products |
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MAX550BC Datasheet(HTML) 3 Page - Maxim Integrated Products |
3 / 12 page Low-Power, +2.5V to +5.5V, 8-Bit Voltage-Output DAC in µMAX _______________________________________________________________________________________ 3 TIMING CHARACTERISTICS (Note 5) (VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Digital inputs switching from 0V to VDD_.) ELECTRICAL CHARACTERISTICS (continued) (VDD1 = VDD2 = +2.5V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.) CS = high, all digital inputs from 0V to VDD_ VDD_ = 5.5V, output unloaded, all inputs = GND or VDD_ Output unloaded, all inputs = GND or VDD To ±1/2LSB, CL = 20pF CLOAD = 20pF Shutdown mode CONDITIONS µA 0.3 Shutdown Current nV-sec 50 Digital Feedthrough and Crosstalk µA 0.3 10 IDD1 + IDD2 Supply Current V 2.5 5.5 VDD_ Supply Voltage Range µs 4 Voltage-Output Settling Time V/µs 1.4 Voltage-Output Slew Rate µs 4 Wake-Up Time UNITS MIN TYP MAX SYMBOL PARAMETER CONDITIONS µs 5 VDD_ High to CS Low ns 30 tDS DIN to SCLK High Setup ns 40 tCL ns 40 tCH SCLK Pulse Width High SCLK Pulse Width Low ns 80 tCP SCLK Period ns 40 tCSW CS Pulse Width High 10 0 DIN to SCLK High Hold ns 30 tCSS0 CS Low to SCLK High Setup ns 30 tCSS1 CS High to SCLK High Setup tCSH0 SCLK High to CS Low Hold UNITS MIN TYP MAX SYMBOL PARAMETER Note 1: 0°C to -40°C testing guaranteed by design using six sigma design limits. Note 2: Worst-case input resistance at REF occurs at DAC code 55 hex. Note 3: Worst-case reference input current occurs at DAC code 55 hex. Note 4: Guaranteed by design. Not production tested. Note 5: Guaranteed by design. Not production tested. Power-on reset delay VDD_ = 2.5V VDD_ = 2.5V CL = 20pF 3.1 SR DYNAMIC PERFORMANCE POWER SUPPLIES VDD_ = 2.5V VDD_ = 5.5V ns 10 tDH VDD_ = 5.5V ns 20 VDD_ = 5.5V ns 20 tCSH1 Delay, SCLK High to CS High |
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