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M464S0824DT1-L1H Datasheet(PDF) 7 Page - Samsung semiconductor

Part # M464S0824DT1-L1H
Description  8Mx64 SDRAM SODIMM based on 4Mx16, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

M464S0824DT1-L1H Datasheet(HTML) 7 Page - Samsung semiconductor

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M464S0824DT1
Rev. 0.0 Jun. 1999
PC100 SODIMM
REFER TO THE INDIVIDUAL COMPONENT, NOT THE WHOLE MODULE.
Parameter
Symbol
-1H
-1L
Unit
Note
Min
Max
Min
Max
CLK cycle time
CAS latency=3
tCC
10
1000
10
1000
ns
1
CAS latency=2
10
12
CLK to valid output delay
CAS latency=3
tSAC
6
6
ns
1,2
CAS latency=2
6
7
Output data hold time
CAS latency=3
tOH
3
3
ns
2
CAS latency=2
3
3
CLK high pulse width
tCH
3
3
ns
3
CLK low pulse width
tCL
3
3
ns
3
Input setup time
tSS
2
2
ns
3
Input hold time
tSH
1
1
ns
3
CLK to output in Low-Z
tSLZ
1
1
ns
2
CLK to output in Hi-Z
CAS latency=3
tSHZ
6
6
ns
CAS latency=2
6
7
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)


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