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TZA3044U Datasheet(PDF) 5 Page - NXP Semiconductors |
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TZA3044U Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 18 page  1998 Jul 07 5 Philips Semiconductors Objective specification 1.25 Gbits/s Gigabit Ethernet postamplifiers TZA3044T; TZA3044U Bonding pad locations Fig.3 Bonding pad locations: TZA3044U. (1) Typical value. Pad size: 90 × 90 µm. handbook, full pagewidth AGND 4 VCCD 27 TEST 26 DGND 25 DOUT 24 DOUTQ 23 DGND 22 TEST 21 DGND 20 AGND 6 DIN 7 DINQ 8 AGND 9 TEST 10 VCCA 11 n.c. 5 TZA3044U 12 3 2 1 32 31 30 29 28 13 14 15 16 17 18 19 MGR242 1.58 mm(1) 1.58(1) mm x y 0 0 FUNCTIONAL DESCRIPTION The TZA3044 accepts up to 1.25 Gbits/s Gigabit Ethernet data streams, with amplitudes from 2 mV (p-p) up to 1 V (p-p) single-ended. The input signal will be amplified and limited to differential PECL output levels (see Fig.1). The input buffer A1 presents an impedance of approximately 4.5 k Ω to the data stream on the inputs DIN and DINQ. The input can be used both single-ended and differential, but differential operation is preferred for better performance. Because of the high gain of the postamplifier, a very small offset voltage would shift the decision level in such a way that the input sensitivity decreases drastically. Therefore a DC offset compensation circuit is implemented in the TZA3044, which keeps the input of buffer A3 at its toggle point in the absence of any input signal. An input signal level detection is implemented to check if the input signal is above the user-programmed level. The outcome of this test is available at the PECL outputs ST and STQ. This flag can also be used to prevent the PECL outputs DOUT and DOUTQ from reacting to noise in the absence of a valid input signal, by connecting the output STQ to the input JAM. This insures that data will only be transmitted when the input signal-to-noise ratio is sufficient for low bit error rate system operation. PECL logic The logic level symbol definitions for PECL are shown in Fig.4. Input biasing The input pins DIN and DINQ are DC biased at approximately 2.55 V by an internal reference generator (see Fig.5). The TZA3044 can be DC coupled, but AC coupling is preferred. In case of DC coupling, the driving source must operate within the allowable input signal range (2.0 V to VCCA + 0.5 V). Also a DC offset voltage of |
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