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| KR52S018M |
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KEC |
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2 page
2007. 3. 19 2/5 KR52S018M/F ~ KR52S033M/F Revision No : 2 Fig. 1 BLOCK DIAGRAM Current Limit Thermal Shutdown Bandgap Ref. VOUT COUT VIN GND + BYPASS CBYPASS ON/OFF CONTROL 1 2 3 4 5 Fig. 2 TEST CIRCUIT / APPLICATION CIRCUIT VOUT = 2.8V COUT = 22µF (tantalum) VIN = 3.8V CBYPASS = 470pF ON/OFF CONTROL 1 2 3 4 5 KR52S028M/F 2 3 1 5 4 Lot No. Type Name MARKING PIN NO. NAME FUNCTION 1 VIN Supply Input 2 GND Ground 3 ON/OFF Control Enable/Shutdown (Input):CMOS conpatible input. Logic high = Enable, Logic low or open = Shutdown 4 Bypass Reference Bypass : Connect external 470pF capacitor to GND to reduce output noise. May be left open 5 VOUT Regulator Output PIN DESCRIPTIONS 54 13 2 Lot No. Type Name PIN DESCRIPTIONS MARKING < SOT-89-5 > < TSV > PIN NO. NAME FUNCTION 1 Bypass Reference Bypass : Connect external 470pF capacitor to GND to reduce output 2 GND Ground 3 ON/OFF Control Enable/Shutdown (Input):CMOS conpatible input. Logic high = Enable, Logic low or open = Shutdown 4 VIN Supply Input 5 VOUT Regulator Output |