PE83511 datasheet(2/7 Pages) PEREGRINE

Part #	PE83511

Description	DC - 1500 MHz Low Power UltraCMOS Divide-by-2 Prescaler Military Operating Temperature Range

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Manufacturer	PEREGRINE [Peregrine Semiconductor Corp.]

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Product Specification

PE83511

Page 2 of 7

Document No. 70-0113-03

│ UltraCMOS™ RFIC Solutions

Table 3. Absolute Maximum Ratings

Electrostatic Discharge (ESD) Precautions

When handling this UltraCMOS™ device, observe

the same precautions that you would use with

other ESD-sensitive devices. Although this device

contains circuitry to protect it from damage due to

ESD, precautions should be taken to avoid

exceeding the rating specified in Table 3.

Latch-Up Avoidance

Unlike conventional CMOS devices, UltraCMOS™

devices are immune to latch-up.

Figure 3. Pin Configuration (Top View)

Device Functional Considerations

The PE83511 divides an input signal, up to a

frequency of 1500 MHz, by a factor of two thereby

producing an output frequency at half the input

frequency. To work properly at higher frequency,

the input and output signals (pins 2, 7 & optional

5) must be AC coupled via an external capacitor.

The input may be DC coupled for low frequency

operation with care taken to remain within the

specified DC input range for the device.

The ground pattern on the board should be made

as wide as possible to minimize ground

impedance. See Figure 8 for a layout example.

OUTB Control

Pin 6 controls whether OUTB is enabled or

disabled. Pin 6 has an internal pull-up resistor.

With no connection (floating), OUTB is disabled.

By grounding pin 6, OUTB is enabled. By

enabling OUTB, this part will consume roughly

5 mA more current.

Absolute Maximum Ratings are those values

listed in the above table. Exceeding these values

may cause permanent device damage. Exposure

to absolute maximum ratings for extended periods

may affect device reliability.

Table 2. Pin Descriptions

8

PE83511

1

2

3

4

7

6

5

IN

GND

N/C

GND

OUT

VDD

CTL

OUT

8

No.

Name

Description

1

VDD

Power supply pin. Bypassing is required

(eg 1000 pF & 100 pF).

2

IN

Input signal pin. Should be coupled with a

capacitor (eg 1000 pF).

3

N/C

No connection. This pin should be left open.

4

GND

Ground pin. Ground pattern on the board

should be as wide as possible to reduce

ground impedance.

5

OUTB

Inverted divided frequency output. This pin

should be coupled with a capacitor

(eg 1000 pF).

6

CTL

Control pin. When grounded OUTB is

enabled.

7

OUT

Divided frequency output. This pin should

be coupled with a capacitor (eg 1000 pF).

8

GND

Ground Pin.

Symbol

Parameter/Conditions

Min

Max

Units

VDD

Supply voltage

4.0

V

Input Power

15

dBm

VIN

Voltage on input

-0.3

VDD

+0.3

V

TST

Storage temperature range

-65

150

°C

TOP

Operating temperature

range

-55

125

°C

VESD

ESD voltage (Human Body

Model, MIL-STD 883)

2000

V

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