83501-00 datasheet(5/8 Pages) PEREGRINE

Part #	83501-00

Description	3.5 GHz Low Power UltraCMOS Divide-by-2 Prescaler Military Operating Temperature Range

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Manufacturer	PEREGRINE [Peregrine Semiconductor Corp.]

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Product Specification

PE83501

Page 5 of 8

Document No. 70-0124-02

│ www.psemi.com

Evaluation Kit

Figure 9. Evaluation Board Layouts

Figure 10. Evaluation Board Schematic

Peregrine Specification 102/0200

Peregrine Specification 101/0035

Applications Support

If you have a problem with your evaluation kit or if you

have applications questions call (858) 731-9400 and

ask for applications support. You may also contact us

by fax or e-mail:

Fax: (858) 731-9499

E-Mail: help@psemi.com

Evaluation Kit Operation

The MSOP Prescaler Evaluation Board was designed

to help customers evaluate the PE83501 Divide-by-2

Prescaler. On this board, the device input (pin 2) is

connected to connector J1 through a 50

Ω transmission

line. A series capacitor (C3) provides the necessary

DC block for the device input. It is important to note

that the value of this capacitance will impact the

performance of the device. A value of 15 pF was found

to be optimal for this board layout; other applications

may require a different value.

The device output (pin 7) is connected to connector J3

through a 50

Ω transmission line. A series capacitor

(C1) provides the necessary DC block for the device

output. Note that this capacitor must be chosen to

have a low impedance at the desired output frequency

the device. The value of 47 pF was chosen to provide

a wide operating range for the evaluation board.

The board is constructed of a two-layer FR4 material

with a total thickness of 0.031”. The bottom layer

provides ground for the RF transmission lines. The

transmission lines were designed using a coplanar

waveguide above ground plane model with trace width

of 0.030”, trace gaps of 0.007”, dielectric thickness of

0.028”, metal thickness of 0.0014” and

ε

r of 4.4.

Note

that the predominate mode for these transmission lines

is coplanar waveguide.

J2 provides DC power to the device. Starting from the

lower left pin, the second pin to the right (J2-3) is

connected to the device VDD pin (1). Two decoupling

capacitors (10 pF, 1000 pF) are included on this trace.

It is the responsibility of the customer to determine

proper supply decoupling for their design application.

The DEC pin (3) must be connected to a low

impedance AC ground for proper device operation. On

the board, two decoupling capacitors (C6 = 10 nF, C4 =

10 pF), located on the back of the board, perform this

function.

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83501-00 Datasheet(PDF) 5 Page - Peregrine Semiconductor Corp.

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